JPS62158550U - - Google Patents

Info

Publication number
JPS62158550U
JPS62158550U JP1986046240U JP4624086U JPS62158550U JP S62158550 U JPS62158550 U JP S62158550U JP 1986046240 U JP1986046240 U JP 1986046240U JP 4624086 U JP4624086 U JP 4624086U JP S62158550 U JPS62158550 U JP S62158550U
Authority
JP
Japan
Prior art keywords
interrupt
mouse
flop
flip
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986046240U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986046240U priority Critical patent/JPS62158550U/ja
Publication of JPS62158550U publication Critical patent/JPS62158550U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Position Input By Displaying (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案のマウス制御回路の割込信号処
理回路の一実施例を示したブロツク図、第2図は
第1図に示した回路を搭載したマウス制御回路の
一例を示したブロツク図、第3図は従来のマウス
制御回路の一例を示したブロツク図である。 1……マウス回路、2……タイマ回路、3,5
,6,8,9……フリツプフロツプ、7……ナン
ドゲート、10……インバータ。
Fig. 1 is a block diagram showing one embodiment of the interrupt signal processing circuit of the mouse control circuit of the present invention, and Fig. 2 is a block diagram showing an example of the mouse control circuit equipped with the circuit shown in Fig. 1. , FIG. 3 is a block diagram showing an example of a conventional mouse control circuit. 1... Mouse circuit, 2... Timer circuit, 3, 5
, 6, 8, 9... flip-flop, 7... NAND gate, 10... inverter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] タイマにより定期的に発せられるパルス毎割り
込みが発せられ、この割り込みに従いマウスの移
動量が検出されるマウス制御回路において、上記
割り込みごとセツトされるフリツプフロツプと、
上記フリツプフロツプがセツトされる毎マウスか
ら到来する移動量データを取込み上記フリツプフ
ロツプをリセツトする割り込み処理回路とから成
るマウス制御回路。
In a mouse control circuit in which an interrupt is issued for each pulse periodically issued by a timer and the amount of movement of the mouse is detected in accordance with this interrupt, a flip-flop is set for each interrupt;
A mouse control circuit comprising an interrupt processing circuit that receives movement amount data coming from the mouse every time the flip-flop is set and resets the flip-flop.
JP1986046240U 1986-03-31 1986-03-31 Pending JPS62158550U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986046240U JPS62158550U (en) 1986-03-31 1986-03-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986046240U JPS62158550U (en) 1986-03-31 1986-03-31

Publications (1)

Publication Number Publication Date
JPS62158550U true JPS62158550U (en) 1987-10-08

Family

ID=30865722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986046240U Pending JPS62158550U (en) 1986-03-31 1986-03-31

Country Status (1)

Country Link
JP (1) JPS62158550U (en)

Similar Documents

Publication Publication Date Title
JPS62158550U (en)
JPH0267446U (en)
JPS6223349U (en)
JPS5923854U (en) Microcomputer interrupt circuit
JPS61126347U (en)
JPH022733U (en)
JPS63118603U (en)
JPH0350247U (en)
JPS62181044U (en)
JPS63118648U (en)
JPH0263115U (en)
JPH02108438U (en)
JPS6454153U (en)
JPS61112452U (en)
JPH0227237U (en)
JPH01146189U (en)
JPH0216617U (en)
JPS5832543U (en) shared storage
JPH0337542U (en)
JPS6454154U (en)
JPS6273630U (en)
JPS5860599U (en) Actuator drive circuit
JPH02113899U (en)
JPS6193031U (en)
JPS647333U (en)