JPH01146189U - - Google Patents

Info

Publication number
JPH01146189U
JPH01146189U JP4197688U JP4197688U JPH01146189U JP H01146189 U JPH01146189 U JP H01146189U JP 4197688 U JP4197688 U JP 4197688U JP 4197688 U JP4197688 U JP 4197688U JP H01146189 U JPH01146189 U JP H01146189U
Authority
JP
Japan
Prior art keywords
timer
lsi
detection device
time information
reference signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4197688U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4197688U priority Critical patent/JPH01146189U/ja
Publication of JPH01146189U publication Critical patent/JPH01146189U/ja
Pending legal-status Critical Current

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Landscapes

  • Electric Clocks (AREA)
  • Measurement Of Predetermined Time Intervals (AREA)
  • Debugging And Monitoring (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案によるタイマLSIの暴走検
知装置の一実施例を説明するブロツク図、第2図
は、同装置の内部を示す仮想的回路ブロツク図、
第3図は、同装置の動作を示すフローチヤートで
ある。 1……CPU、1a……計数手段、1b……時
間設定部、1c……比較手段、1d……時間取込
手段、1e……書込手段、2……インターバルタ
イマ、3……タイマLSI、3a……RAM、R
EF……基準信号、TIM……時間情報。
FIG. 1 is a block diagram illustrating an embodiment of a timer LSI runaway detection device according to the present invention, and FIG. 2 is a virtual circuit block diagram showing the inside of the device.
FIG. 3 is a flowchart showing the operation of the device. 1...CPU, 1a...Counting means, 1b...Time setting section, 1c...Comparison means, 1d...Time acquisition means, 1e...Writing means, 2...Interval timer, 3...Timer LSI , 3a...RAM, R
EF...Reference signal, TIM...Time information.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] クロツク信号あるいはインターバルタイマ等の
基準信号と、タイマLSIが出力する時間情報と
を所定時間毎比較する手段を備えたことを特徴と
するタイマLSIの暴走検知装置。
A runaway detection device for a timer LSI, comprising means for comparing a reference signal such as a clock signal or an interval timer with time information output by the timer LSI at predetermined intervals.
JP4197688U 1988-03-31 1988-03-31 Pending JPH01146189U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4197688U JPH01146189U (en) 1988-03-31 1988-03-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4197688U JPH01146189U (en) 1988-03-31 1988-03-31

Publications (1)

Publication Number Publication Date
JPH01146189U true JPH01146189U (en) 1989-10-09

Family

ID=31268402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4197688U Pending JPH01146189U (en) 1988-03-31 1988-03-31

Country Status (1)

Country Link
JP (1) JPH01146189U (en)

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