JPS62158390A - Electronic circuit device - Google Patents

Electronic circuit device

Info

Publication number
JPS62158390A
JPS62158390A JP29764285A JP29764285A JPS62158390A JP S62158390 A JPS62158390 A JP S62158390A JP 29764285 A JP29764285 A JP 29764285A JP 29764285 A JP29764285 A JP 29764285A JP S62158390 A JPS62158390 A JP S62158390A
Authority
JP
Japan
Prior art keywords
hybrid integrated
integrated circuit
motherboard
terminal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29764285A
Other languages
Japanese (ja)
Inventor
啓二 金澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba AVE Co Ltd
Original Assignee
Toshiba Corp
Toshiba Audio Video Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Audio Video Engineering Co Ltd filed Critical Toshiba Corp
Priority to JP29764285A priority Critical patent/JPS62158390A/en
Publication of JPS62158390A publication Critical patent/JPS62158390A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は、マザー基板に混成集積回路を搭載してなる複
合電子回路装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a composite electronic circuit device in which a hybrid integrated circuit is mounted on a motherboard.

[発明の技術的背景とその問題点] 近年、電子機器の小型軽量化に伴ない厚膜回路を用いた
混成集積回路が多用されている。
[Technical background of the invention and its problems] In recent years, hybrid integrated circuits using thick film circuits have been widely used as electronic devices become smaller and lighter.

この混成集積回路に用いられる厚膜回路は一般に次のよ
うにして製造されている。
The thick film circuit used in this hybrid integrated circuit is generally manufactured as follows.

すなわち、まず第3図に示すように、アルミナ等のセラ
ミックス材料で形成された絶縁基板1に、例えば銀パラ
ジウム(Aa /Pd )粉末を含む導体ペーストを印
刷、焼成して下部導体層2および端子取りつけパッド2
aを形成する。このとき端子取りつけパッド2aは基板
の一側面に一列に必要な個数だけ形成される。次いで所
用の個所に絶縁ペーストを印刷し、焼成して絶縁体層3
を形成し、その上に酸化ルテニウム(Ru 02 )粉
末を含む抵抗ペーストを印刷、焼成して抵抗体層4を形
成する。ざらに、銀パラジウム粉末を含む導体ペースト
を印刷、焼成して上部導体層5を形成し、その上に保護
コートを設け、レーザトリマーにより抵抗値を調整し端
子取付パッド2aに端子を取付けて完成する。
That is, as shown in FIG. 3, first, a conductor paste containing, for example, silver palladium (Aa/Pd) powder is printed and fired on an insulating substrate 1 made of a ceramic material such as alumina to form a lower conductor layer 2 and terminals. Mounting pad 2
form a. At this time, the required number of terminal mounting pads 2a are formed in a line on one side of the substrate. Next, insulating paste is printed on the required locations and fired to form the insulating layer 3.
A resistor layer 4 is formed by printing and firing a resistor paste containing ruthenium oxide (Ru 02 ) powder thereon. Roughly, a conductor paste containing silver palladium powder is printed and fired to form the upper conductor layer 5, a protective coat is provided on top of it, the resistance value is adjusted with a laser trimmer, and the terminal is attached to the terminal mounting pad 2a to complete the process. do.

混成集積回路は、この厚膜回路6に通常リード線のない
チップタイプの受動素子を半田付けして構成されており
、これをマザー基板に取りつける場合には、第4図に示
すように、マザー基板7の透孔に端子取りつけランド7
a、7a・・・7aを設けてこの透孔に混成集積回路8
の端子取付パッド2aに接続された端子8aを挿入し、
ざらに同様にしてマザー基板7の透孔にランド7bが形
成され、この透孔にディスクリート部品(リード付部品
)9の端子9aが挿入されて半田付けが行なわれる。
The hybrid integrated circuit is constructed by soldering chip-type passive elements, which usually have no lead wires, to the thick film circuit 6. When mounting this on a motherboard, as shown in FIG. Terminal mounting land 7 in the through hole of the board 7
a, 7a...7a are provided and a hybrid integrated circuit 8 is provided in this through hole.
Insert the terminal 8a connected to the terminal mounting pad 2a of
Roughly in the same manner, lands 7b are formed in the through holes of the motherboard 7, and the terminals 9a of the discrete components (components with leads) 9 are inserted into these through holes and soldered.

しかしながらこのような従来の回路構成では、部品ラン
ド7bから混成集積回路8の端子が取りつけられる端子
取付はランド8aまで回路パターンを引き回す必要があ
り、またマザー基板7に端子取りつけランド7aを設け
るためその周辺に他のディスクリート部品等を取りつけ
ることができず、高密度の実装を行うことが困難である
という問題があった。
However, in such a conventional circuit configuration, it is necessary to route the circuit pattern from the component land 7b to the land 8a in order to attach the terminal of the hybrid integrated circuit 8, and in addition, since the terminal attachment land 7a is provided on the motherboard 7, There was a problem in that other discrete components etc. could not be attached to the periphery, making it difficult to perform high-density mounting.

[発明の目的] 本発明はこのような問題を解決するためになされたもの
で、マザー基板に混成集積回路の端子を接続するための
端子取りつけランドを設ける必要がなく、従って実装密
度を向上させることのできる電子回路装置を提供するこ
とを目的とする。
[Object of the Invention] The present invention was made to solve such problems, and it is not necessary to provide a terminal mounting land for connecting the terminals of the hybrid integrated circuit to the motherboard, thus improving the packaging density. The purpose of the present invention is to provide an electronic circuit device that can perform the following steps.

[発明の概要] すなわら本発明の電子回路装置は、マザー基板の一方の
面にディスクリート部品がその端子をマザー基板に貫通
させて半田づけされ、他方の面に混成集積回路が前記マ
ザー基板から突出しているディスクリート部品の端子に
半田付は固定されかつこの端子を介して前記マザー基板
と電気的に接続することにより、マザー基板に混成集積
回路の端子を接続するための端子取りつけランドを設け
る必要をなくし、これによって実装密度を向上させたも
のである。
[Summary of the Invention] In other words, in the electronic circuit device of the present invention, discrete components are soldered to one surface of a motherboard by passing their terminals through the motherboard, and a hybrid integrated circuit is soldered to the other surface of the motherboard. The solder is fixed to the terminal of the discrete component protruding from the terminal and is electrically connected to the motherboard through this terminal, thereby providing a terminal mounting land for connecting the terminal of the hybrid integrated circuit to the motherboard. This eliminates the need for this, thereby improving packaging density.

本発明においては、混成集積回路基板の端子取りつけ部
分を、できるだけ多くかつ広範囲に配置することにより
、回路設計の自由度をより大きくして一層の高密度化を
はかることができる。
In the present invention, by arranging the terminal attachment portions of the hybrid integrated circuit board as many times as possible over a wide range, the degree of freedom in circuit design can be increased and higher density can be achieved.

[発明の実施例] 次に本発明の実施例を図面を参照して説明する。[Embodiments of the invention] Next, embodiments of the present invention will be described with reference to the drawings.

この実施例の混成集積回路は、第1図に示すように、ア
ルミナ等からなる絶縁基板11に、ランダムに配置され
た端子取りつけパッド12aを含む下部導体層12を印
刷、焼成により形成し、次いで絶縁体層13、抵抗体層
14、上部導体層15および保護コートを順に形成し、
レーザトリマー等により抵抗値を調整して得た厚膜回路
16に、図示を省略したリードレス部品を実装して形成
されている。そしてこの混成集積回路17の端子取りつ
けパッド12aには透孔21があけられている。そして
この透孔21に、第2図に示すように、あらかじめマザ
ー基板18に貫通させたディスクリート部品19の端子
20のマザー基板から出ている部分を貫通させて半田付
けすることにより混成集積回路17がマザー基板18に
取りつけられている。ここで半田付けは全部の端子に行
なう必要はなく、半田付けの必要なものについてのみ行
ない伯は単に透孔に挿通しておいただけでもよい。
In the hybrid integrated circuit of this embodiment, as shown in FIG. 1, a lower conductor layer 12 including randomly arranged terminal mounting pads 12a is formed on an insulating substrate 11 made of alumina or the like by printing and firing, and then forming an insulator layer 13, a resistor layer 14, an upper conductor layer 15, and a protective coat in this order;
It is formed by mounting leadless components (not shown) on a thick film circuit 16 whose resistance value is adjusted using a laser trimmer or the like. A through hole 21 is formed in the terminal mounting pad 12a of the hybrid integrated circuit 17. Then, as shown in FIG. 2, the parts of the terminals 20 of the discrete component 19, which have been passed through the mother board 18 in advance, protruding from the mother board are passed through the through holes 21 and soldered to the hybrid integrated circuit 17. is attached to the mother board 18. Here, it is not necessary to solder all the terminals; it is sufficient to perform soldering only on those that require soldering, and simply insert the terminals into the through holes.

なおディスクリート部品19のマザー基板を貫通して出
ている端子20のうち混成集積回路の取りつけに不必要
なものは混成集積回路19の取付前に切断されている。
Note that among the terminals 20 extending through the motherboard of the discrete component 19, those that are unnecessary for mounting the hybrid integrated circuit are cut off before mounting the hybrid integrated circuit 19.

このように本発明では、混成集積回路に端子取付位置ま
での回線パターンの引き回しが不要になり、またマザー
基板18に混成集積回路17を取りつけるランドが不必
要となるため、その部分だけ他の部品をマザー基板内に
配置可能となり、全体として高密度化を図ることができ
る。
In this way, in the present invention, it is not necessary to route the line pattern to the terminal mounting position in the hybrid integrated circuit, and the land for attaching the hybrid integrated circuit 17 to the mother board 18 is not required, so that only that part can be connected to other parts. can be placed inside the motherboard, and the overall density can be increased.

[発明の効果] 以上説明したように本発明では、マザー基板に混成集積
回路の回路パターンの引き回しが不必要になり、従って
回路全体を高密度化することができる。またマザー基板
においては混成集積回路の取りつけ場所であったところ
に他の部品を取りつけることができるようになり、全体
としても高密度化をはかることができる。
[Effects of the Invention] As explained above, according to the present invention, it becomes unnecessary to route the circuit pattern of the hybrid integrated circuit on the motherboard, and therefore the entire circuit can be made more dense. In addition, on the motherboard, other parts can be attached to the place where the hybrid integrated circuit was attached, and the overall density can be increased.

【図面の簡単な説明】 第1図は本発明における混成集積回路の平面図、第2図
は本発明装置を概略的に示す断面図、第3図従来の混成
集積回路に使用される厚膜回路基板を示す平面図、第4
図は本発明の実施例を概略的に示す断面図である。 1.11・・・・・・・・・絶縁基板 2.12・・・・・・・・・下部導体層2a 、12a
・・・端子取りつけパッド3.13・・・・・・・・・
絶縁体層 4.14・・・・・・・・・抵抗体層 5.15・・・・・・・・・上部導体層6.16・・・
・・・・・・厚膜回路 7.18・・・・・・・・・マザー基板8.17・・・
・・・・・・混成集積回路9.19・・・・・・・・・
ディスクリート部品20・・・・・・・・・・・・・・
・混成集積回路に取りつけるディスクリート部品の端子 21・・・・・・・・・・・・・・・透孔出願人   
  株式会社 東芝 東芝オーディオ・ビデオ エンジニアリング株式会社 代理人 弁理士 須 山 佐 − ′11) 第1図 第2区
[Brief Description of the Drawings] Fig. 1 is a plan view of a hybrid integrated circuit according to the present invention, Fig. 2 is a sectional view schematically showing the device of the present invention, and Fig. 3 is a thick film used in a conventional hybrid integrated circuit. Plan view showing the circuit board, No. 4
The figure is a sectional view schematically showing an embodiment of the invention. 1.11...Insulating substrate 2.12...Lower conductor layer 2a, 12a
・・・Terminal mounting pad 3.13・・・・・・・・・
Insulator layer 4.14... Resistor layer 5.15... Upper conductor layer 6.16...
...Thick film circuit 7.18...Mother board 8.17...
・・・・・・Hybrid integrated circuit 9.19・・・・・・・・・
Discrete parts 20・・・・・・・・・・・・・・・
・Terminal 21 of a discrete component attached to a hybrid integrated circuit...Through-hole applicant
Toshiba Corporation Toshiba Audio/Video Engineering Co., Ltd. Agent Patent Attorney Sasu Suyama - '11) Figure 1, Section 2

Claims (1)

【特許請求の範囲】[Claims] (1)マザー基板の一方の面にディスクリート部品がそ
の端子をマザー基板に貫通させて半田づけされ、他方の
面に混成集積回路が前記マザー基板から突出しているデ
ィスクリート部品の端子に半田付け固定されかつこのデ
ィスクリート部品の端子を介して前記マザー基板と電気
的に接続されていることを特徴とする電子回路装置。
(1) A discrete component is soldered to one side of the motherboard with its terminal passing through the motherboard, and a hybrid integrated circuit is fixed to the other side by soldering to the terminal of the discrete component protruding from the motherboard. An electronic circuit device characterized in that the electronic circuit device is electrically connected to the motherboard via a terminal of the discrete component.
JP29764285A 1985-12-29 1985-12-29 Electronic circuit device Pending JPS62158390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29764285A JPS62158390A (en) 1985-12-29 1985-12-29 Electronic circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29764285A JPS62158390A (en) 1985-12-29 1985-12-29 Electronic circuit device

Publications (1)

Publication Number Publication Date
JPS62158390A true JPS62158390A (en) 1987-07-14

Family

ID=17849221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29764285A Pending JPS62158390A (en) 1985-12-29 1985-12-29 Electronic circuit device

Country Status (1)

Country Link
JP (1) JPS62158390A (en)

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