JPS62152442U - - Google Patents
Info
- Publication number
- JPS62152442U JPS62152442U JP3907886U JP3907886U JPS62152442U JP S62152442 U JPS62152442 U JP S62152442U JP 3907886 U JP3907886 U JP 3907886U JP 3907886 U JP3907886 U JP 3907886U JP S62152442 U JPS62152442 U JP S62152442U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- wiring board
- substrate
- semiconductor device
- sealing body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 230000000630 rising effect Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第1図は本考案の一実施例の側面断面図、第2
図は第1図に示す実施例において、配線基板が変
形したときの要部の状態を示す図、第3図は接合
部に加わる力とリードの角度の関係を計算した結
果を示す図、第4図および第5図は本考案の別の
実施例の側面断面図、第6図は従来の半導体装置
の一例の側面断面図、第7図は第6図における配
線基板が変形したときの要部の状態を示す図であ
る。 1…基板、2…半導体チツプ、3…ワイヤ、4
,4′…リード、5…封止体、6…配線基板、7
…パツド、8,10…接合材、9…導体。
図は第1図に示す実施例において、配線基板が変
形したときの要部の状態を示す図、第3図は接合
部に加わる力とリードの角度の関係を計算した結
果を示す図、第4図および第5図は本考案の別の
実施例の側面断面図、第6図は従来の半導体装置
の一例の側面断面図、第7図は第6図における配
線基板が変形したときの要部の状態を示す図であ
る。 1…基板、2…半導体チツプ、3…ワイヤ、4
,4′…リード、5…封止体、6…配線基板、7
…パツド、8,10…接合材、9…導体。
Claims (1)
- 【実用新案登録請求の範囲】 半導体チツプと、チツプの電極を外に取り出し
配線基板に接続するためのリードと、 前記リードが固定される封止体又は基板を有す
る半導体装置において、前記リードの前記配線基
板との接合部から立ち上げる部分に、前記封止体
又は基板のリードの固定部に対して、外側に傾け
た部分を設けたことを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3907886U JPS62152442U (ja) | 1986-03-19 | 1986-03-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3907886U JPS62152442U (ja) | 1986-03-19 | 1986-03-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62152442U true JPS62152442U (ja) | 1987-09-28 |
Family
ID=30851918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3907886U Pending JPS62152442U (ja) | 1986-03-19 | 1986-03-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62152442U (ja) |
-
1986
- 1986-03-19 JP JP3907886U patent/JPS62152442U/ja active Pending