JPS62151777U - - Google Patents
Info
- Publication number
- JPS62151777U JPS62151777U JP4036486U JP4036486U JPS62151777U JP S62151777 U JPS62151777 U JP S62151777U JP 4036486 U JP4036486 U JP 4036486U JP 4036486 U JP4036486 U JP 4036486U JP S62151777 U JPS62151777 U JP S62151777U
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- test coupon
- cut groove
- passing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Printed Boards (AREA)
Description
第１図ａおよびｂは本考案の一実施例を示す斜
視図および要部平面図、第２図は本考案の一応用
例を示す要部斜視図、第３図は従来のプリンヘ配
線板の構成例を示す平面図である。
第１図において、１はプリント配線板、２はテ
ストクーポン、３は切り込み溝、４はフツトプリ
ント、５はＩＣ、６はＩＣのフラツトリード１を
示す。
Figures 1a and b are a perspective view and a plan view of a main part showing an embodiment of the present invention, Figure 2 is a perspective view of a main part showing an example of an application of the present invention, and Figure 3 is a configuration of a conventional printer wiring board. FIG. 3 is a plan view showing an example. In FIG. 1, 1 is a printed wiring board, 2 is a test coupon, 3 is a cut groove, 4 is a footprint, 5 is an IC, and 6 is a flat lead 1 of the IC.
Claims (1)
ト４で囲まれる領域内にテストクーポン２を有し
、このテストクーポンの周囲に、このテストクー
ポンの一部が前記プリント配線板に接続された状
態で、かつプリント配線板を貫通する切り込み溝
３を有してなることを特徴とするテストクーポン
付きプリント配線板。 A test coupon 2 is provided in the area surrounded by the foot print 4 on the surface mounting printed wiring board 1, and a part of the test coupon is connected to the printed wiring board around the test coupon. A printed wiring board with a test coupon, characterized in that the printed wiring board has a cut groove 3 passing through the printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4036486U JPS62151777U (en) | 1986-03-18 | 1986-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4036486U JPS62151777U (en) | 1986-03-18 | 1986-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62151777U true JPS62151777U (en) | 1987-09-26 |
Family
ID=30854392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4036486U Pending JPS62151777U (en) | 1986-03-18 | 1986-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62151777U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019069709A1 (en) * | 2017-10-05 | 2019-04-11 | ソニー株式会社 | Substrate, manufacturing method, and electronic device |
-
1986
- 1986-03-18 JP JP4036486U patent/JPS62151777U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019069709A1 (en) * | 2017-10-05 | 2019-04-11 | ソニー株式会社 | Substrate, manufacturing method, and electronic device |
| US11757053B2 (en) | 2017-10-05 | 2023-09-12 | Sony Corporation | Package substrate having a sacrificial region for heat sink attachment |