JPS6214535U - - Google Patents

Info

Publication number
JPS6214535U
JPS6214535U JP10174485U JP10174485U JPS6214535U JP S6214535 U JPS6214535 U JP S6214535U JP 10174485 U JP10174485 U JP 10174485U JP 10174485 U JP10174485 U JP 10174485U JP S6214535 U JPS6214535 U JP S6214535U
Authority
JP
Japan
Prior art keywords
pulse
signal
generated
pulse signal
reset signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10174485U
Other languages
Japanese (ja)
Other versions
JPH049638Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10174485U priority Critical patent/JPH049638Y2/ja
Publication of JPS6214535U publication Critical patent/JPS6214535U/ja
Application granted granted Critical
Publication of JPH049638Y2 publication Critical patent/JPH049638Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す回路図、第
2図は各部波形図である。 1……マイクロコンピユータ、2……ウオツチ
ドツグタイマ、3……カウンタ、4……パルス幅
測定回路、9……負荷。
FIG. 1 is a circuit diagram showing an embodiment of this invention, and FIG. 2 is a waveform diagram of each part. 1... Microcomputer, 2... Watchdog timer, 3... Counter, 4... Pulse width measurement circuit, 9... Load.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定周期毎に生じる第1のパルス信号と、第1
のパルス信号が繰返し発生している時に1個だけ
生じる第2のパルス信号とを発生するマイクロコ
ンピユータと、第1のパルスが所定期間発生しな
い時はマイクロコンピユータをリセツトするため
のリセツト信号を発生するウオツチドツグタイマ
と、ウオツチドツグタイマから送出されるリセツ
ト信号をカウントするカウンタと、第2のパルス
信号のパルス幅が所定範囲内にあるときカウンタ
をリセツトするリセツト信号を発生するパルス幅
測定回路とから構成されるマイクロコンピユータ
異常検出回路。
a first pulse signal generated every predetermined period;
a second pulse signal that occurs only once when the first pulse signal is repeatedly generated, and a reset signal for resetting the microcomputer when the first pulse is not generated for a predetermined period of time A watchdog timer, a counter that counts the reset signal sent from the watchdog timer, and a pulse width that generates a reset signal that resets the counter when the pulse width of the second pulse signal is within a predetermined range. A microcomputer abnormality detection circuit consisting of a measurement circuit.
JP10174485U 1985-07-05 1985-07-05 Expired JPH049638Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10174485U JPH049638Y2 (en) 1985-07-05 1985-07-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10174485U JPH049638Y2 (en) 1985-07-05 1985-07-05

Publications (2)

Publication Number Publication Date
JPS6214535U true JPS6214535U (en) 1987-01-28
JPH049638Y2 JPH049638Y2 (en) 1992-03-10

Family

ID=30972753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10174485U Expired JPH049638Y2 (en) 1985-07-05 1985-07-05

Country Status (1)

Country Link
JP (1) JPH049638Y2 (en)

Also Published As

Publication number Publication date
JPH049638Y2 (en) 1992-03-10

Similar Documents

Publication Publication Date Title
JPS6214535U (en)
JPS62100545U (en)
JPS6454153U (en)
JPS61126347U (en)
JPS61112452U (en)
JPS61168434U (en)
JPH0324183U (en)
JPS61133829U (en)
JPS62121076U (en)
JPS6192043U (en)
JPS62169898U (en)
JPS6289041U (en)
JPS61189397U (en)
JPS62181044U (en)
JPS6289089U (en)
JPS62158550U (en)
JPH0164013U (en)
JPS6293295U (en)
JPS62175356U (en)
JPS6228262U (en)
JPS6253791U (en)
JPS63143950U (en)
JPH0196044U (en)
JPH0466576U (en)
JPS63107046U (en)