JPS6214426A - Drawing and exposure for semiconductor wafer - Google Patents

Abstract

PURPOSE:To draw plural different types of semiconductor chips on a wafer for exposure of the chips by a method wherein the region of the wafer is divided into sections for drawing and an exposure of every chip the respective sections is exposed to light on the basis of the mutually different drawing information and the different types of graphic information are drawn on the wafer. CONSTITUTION:Chip graphic information sources 4 and 5, on the basis of which the same chips are subjected to drawing and exposure, are inputted in a semiconductor wafer drawing/exposing unit 6. Moreover, the information on the chip size of each chip, the ratio of chips to be produced by drawing and exposure, on a wafer, and the wafer diameter is inputted in the unit 6. In a control operation part 6A in the unit 6, a repeat number of times of the drawing which should be drawn every the same chips to the longitudinal direction and the lateral direction, is decided and the region of the wafer 7 is sectioned into groups of the same chips, and an exposure is performed. The lower part 7A of the wafer 7 is made to correspond to the information source 4, and the upper part 7B of the wafer 7 to the information source 5. By this way, plural different types of semiconductor chips are drawn on the wafer 7 and the chips are exposed to light.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor wafer drawing exposure method for drawing graphic information on the same semiconductor wafer.

[Conventional technology]

Conventional semiconductor wafer drawing exposure is as shown in Figure 2.
Graphic information 1 of a single product type is given to a semiconductor wafer exposure device 2, and a control calculation unit 2A in the semiconductor wafer device 2 repeatedly performs pattern exposure. Therefore, conventionally, all the chips on the wafer 3 had the same shape as shown in FIG. 2.

[Problem that the invention seeks to solve]

Recently, more than a dozen transistors have been mounted on a semiconductor chip, and in terms of manufacturing, chips are being manufactured using large-diameter wafers. Under these circumstances, the market demands complex and multifunctional semiconductor chips, while -
The amount required for each variety indicates a situation where a large amount is not necessarily required.

However, with conventional methods, only a single type of wafer can be drawn and exposed at a time, so it has been difficult to achieve high-mix, low-volume production with semiconductor chip manufacturing methods that process dozens of wafers at once.

In view of this situation, the present invention provides a semiconductor wafer drawing exposure method for drawing and exposing a plurality of different types of semiconductor chips on the same wafer 1.

[Means for solving problems]

The present invention divides the areas to be exposed for each chip on the same semiconductor wafer, performs exposure for each area based on different writing information, and draws different types of graphic information on the same semiconductor wafer. This is a semiconductor wafer drawing exposure method that is characterized by:

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. 1st
In the figure, first, the graphic information sources 4 and 5 of the chip to be exposed on the same chip are transferred to the semiconductor wafer exposure device 6.
By inputting the chip dimensions of each chip, the ratio of the number of chips to be drawn and exposed on the wafer, and the wafer diameter into the device 6, the control calculation unit 6A in the device 6
The number of drawings to be drawn for each same Tezzo is determined as the number of repetitions in the vertical and horizontal directions, and the chips are divided into the same chip group and exposed. A wafer 7 manufactured by drawing exposure according to the method of the present invention is shown in FIG. The lower part 7 of the wafer 7 shown in FIG.
A to the chip figure information source 4 and the upper part 7B of the wafer 7
correspond to the chip graphic information source 5, respectively. Further, the chip graphic information source may be in the form of a specific graphic, or may be information recorded on a magnetic tape or the like.

〔Effect of the invention〕

As explained above, the present invention enables the manufacture of multiple types of semiconductor devices in one semiconductor manufacturing process, and facilitates the production of a wide variety of products in small quantities. In addition, since the waiting time of the drawing exposure device is reduced, the effective manufacturing time can be shortened, and multiple types of products that are functionally connected within one wafer can be printed and exposed with redundancy. If you wire between chips, l
This has the effect that one system can be realized within a wafer.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a drawing exposure method according to the present invention, and FIG. 2 is a diagram showing a conventional example. 4.4... Input figure information, 6... Semiconductor wafer drawing exposure device, 6A... Control calculation unit, 7... Wafer.

Claims (1)

[Claims] (1) Divide the area to be exposed for drawing on each chip on the same semiconductor wafer, perform drawing exposure on each area based on different drawing information, and draw graphic information of different types on the same semiconductor wafer. Characteristic semiconductor wafer drawing exposure method.