JPS62143331U - - Google Patents

Info

Publication number
JPS62143331U
JPS62143331U JP3132186U JP3132186U JPS62143331U JP S62143331 U JPS62143331 U JP S62143331U JP 3132186 U JP3132186 U JP 3132186U JP 3132186 U JP3132186 U JP 3132186U JP S62143331 U JPS62143331 U JP S62143331U
Authority
JP
Japan
Prior art keywords
circuit
time constant
monostable multivibrator
inverts
pulse signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3132186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3132186U priority Critical patent/JPS62143331U/ja
Publication of JPS62143331U publication Critical patent/JPS62143331U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係るM・M回路の実施例を示
す回路図、第2図は本考案に係る時定数回路の動
作波形図、第3図は本考案回路の定常状態時の動
作を説明するための信号波形図、第4図は本考案
回路の動作電源印加時の動作を説明するための信
号波形図、第5図は従来のM・M回路を示す回路
図、第6図は従来回路の動作を説明するための信
号波形図である。 2…NOR回路、3…第1の時定数回路、5…
インバータ回路、7…第2の時定数回路、10…
単安定マルチバイブレータ回路。
Figure 1 is a circuit diagram showing an embodiment of the M/M circuit according to the present invention, Figure 2 is an operating waveform diagram of the time constant circuit according to the present invention, and Figure 3 is the operation of the circuit of the present invention in a steady state. FIG. 4 is a signal waveform diagram for explaining the operation of the circuit of the present invention when power is applied. FIG. 5 is a circuit diagram showing a conventional M/M circuit. FIG. 3 is a signal waveform diagram for explaining the operation of a conventional circuit. 2...NOR circuit, 3...first time constant circuit, 5...
Inverter circuit, 7... second time constant circuit, 10...
Monostable multivibrator circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力パルス信号の前縁に同期して反転するゲー
ト回路と、このゲート回路の出力端に接続される
第1の時定数回路と、この第1の時定数回路の出
力電圧をパルス化回路とを備え、このパルス化回
路の出力パルス信号の後縁により前記ゲート回路
を再反転させる単安定マルチバイブレータ回路に
おいて、動作電源の印加に応じて応答しその出力
電圧により前記第1の時定数回路の出力電圧を制
御する第2の時定数回路を有することを特徴とす
る単安定マルチバイブレータ回路。
A gate circuit that inverts in synchronization with the leading edge of an input pulse signal, a first time constant circuit connected to the output terminal of this gate circuit, and a circuit that pulses the output voltage of this first time constant circuit. In a monostable multivibrator circuit which re-inverts the gate circuit by the trailing edge of the output pulse signal of the pulse generator, the monostable multivibrator circuit responds in response to application of an operating power supply and the output voltage of the first time constant circuit A monostable multivibrator circuit comprising a second time constant circuit for controlling voltage.
JP3132186U 1986-03-06 1986-03-06 Pending JPS62143331U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3132186U JPS62143331U (en) 1986-03-06 1986-03-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3132186U JPS62143331U (en) 1986-03-06 1986-03-06

Publications (1)

Publication Number Publication Date
JPS62143331U true JPS62143331U (en) 1987-09-10

Family

ID=30836946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3132186U Pending JPS62143331U (en) 1986-03-06 1986-03-06

Country Status (1)

Country Link
JP (1) JPS62143331U (en)

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