JPS62188994U - - Google Patents
Info
- Publication number
- JPS62188994U JPS62188994U JP1986075691U JP7569186U JPS62188994U JP S62188994 U JPS62188994 U JP S62188994U JP 1986075691 U JP1986075691 U JP 1986075691U JP 7569186 U JP7569186 U JP 7569186U JP S62188994 U JPS62188994 U JP S62188994U
- Authority
- JP
- Japan
- Prior art keywords
- motor
- signal
- pulse
- detection section
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003708 edge detection Methods 0.000 claims description 4
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 3
- 230000007423 decrease Effects 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Control Of Direct Current Motors (AREA)
Description
第1図は本考案の直流モーター用速度制御回路
のブロツク図、第2図及び第3図は夫々この制御
回路の動作を説明するタイミングチヤート及びフ
ローチヤート、第4図は従来の直流モーター用速
度制御回路図である。
10……直流モーター用速度制御回路、11…
…エツジ検出部、12……カウンター、13……
DFF。
Fig. 1 is a block diagram of the speed control circuit for a DC motor according to the present invention, Figs. 2 and 3 are a timing chart and a flow chart explaining the operation of this control circuit, respectively, and Fig. 4 is a conventional speed control circuit for a DC motor. It is a control circuit diagram. 10... Speed control circuit for DC motor, 11...
...Edge detection unit, 12...Counter, 13...
DFF.
Claims (1)
て、該FG信号発生手段からのFG信号のエツジ
を検出してこのエツジ発生に同期したパルスを発
生するエツジ検出部と、上記直流モーターへの印
加電圧の供給が断たれた際、該直流モーターの回
転速度の低下に伴なつてFG信号の周期が所定以
上に長くなつた後にパルスを出力するパルス発生
手段と、該パルス発生手段からの出力パルスによ
つて高レベルとなり、かつ上記エツジ検出部から
の出力パルスによつて低レベルとなる通電信号を
得る通電信号発生手段と、該通電信号が高レベル
のときだけ直流モーターに印加電圧を供給する電
圧供給手段とを少くとも備えたことを特徴とする
直流モーター用速度制御回路。 A DC motor having an FG signal generation means includes an edge detection section that detects an edge of the FG signal from the FG signal generation means and generates a pulse synchronized with the edge generation, and an edge detection section that supplies an applied voltage to the DC motor. A pulse generating means that outputs a pulse after the period of the FG signal becomes longer than a predetermined value as the rotational speed of the DC motor decreases when the DC motor is cut off; energization signal generation means for obtaining an energization signal that is at a high level and becomes a low level in response to an output pulse from the edge detection section; and a voltage supply means for supplying an applied voltage to the DC motor only when the energization signal is at a high level. A speed control circuit for a DC motor, comprising at least the following.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986075691U JPS62188994U (en) | 1986-05-20 | 1986-05-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986075691U JPS62188994U (en) | 1986-05-20 | 1986-05-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62188994U true JPS62188994U (en) | 1987-12-01 |
Family
ID=30922072
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986075691U Pending JPS62188994U (en) | 1986-05-20 | 1986-05-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62188994U (en) |
-
1986
- 1986-05-20 JP JP1986075691U patent/JPS62188994U/ja active Pending
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