JPS61123644U - - Google Patents
Info
- Publication number
- JPS61123644U JPS61123644U JP719385U JP719385U JPS61123644U JP S61123644 U JPS61123644 U JP S61123644U JP 719385 U JP719385 U JP 719385U JP 719385 U JP719385 U JP 719385U JP S61123644 U JPS61123644 U JP S61123644U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- signal
- unit
- correction
- voltage setting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000012544 monitoring process Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Control Of Ac Motors In General (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Description
第１図は本考案の実施例を示す回路図、第２図
は電圧補正部を作用させない場合のインバータの
レギユレーシヨン特性を示すグラフ、第３図は電
圧補正部を作用させた場合のインバータのレギユ
レーシヨン特性を示すグラフである。
１Ａ，１Ｂ……インバータ、２……負荷、３…
…共通制御部、３１……マスター発振器、４……
電圧検出部、５……電圧補正部、６……電圧監視
部。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a graph showing the regulation characteristics of the inverter when the voltage correction section is not applied, and Fig. 3 is a graph showing the regulation characteristics of the inverter when the voltage correction section is applied. It is a graph showing characteristics. 1A, 1B...Inverter, 2...Load, 3...
...Common control unit, 31...Master oscillator, 4...
Voltage detection section, 5... Voltage correction section, 6... Voltage monitoring section.
Claims (1)
クロツクパルスと、電圧設定部よりの電圧設定信
号とにもとづいて複数のインバータを並列運転す
るものにおいて、 インバータ群の並列接続点の電圧を検出する電
圧検出部を設け、この電圧検出部よりの電圧検出
信号と予め定めた補正電圧設定信号とを突き合わ
せて、その偏差分を電圧補正信号として並列接続
されたインバータに各別に出力する電圧補正部と
、前記電圧検出信号が予め定めた基準値よりも低
いときには、電圧補正部における電圧の補正を禁
止する電圧監視部とを前記共通制御部に設け、前
記電圧設定部よりの電圧設定信号に前記電圧補正
信号を加算するようにしたことを特徴とするイン
バータの並列運転制御装置。[Claims for Utility Model Registration] In a device that operates multiple inverters in parallel based on a control clock pulse sent from a master oscillator of a common control unit and a voltage setting signal from a voltage setting unit, A voltage detection section that detects voltage is provided, and the voltage detection signal from this voltage detection section is compared with a predetermined correction voltage setting signal, and the deviation is output as a voltage correction signal to each inverter connected in parallel. The common control unit includes a voltage correction unit and a voltage monitoring unit that prohibits voltage correction in the voltage correction unit when the voltage detection signal is lower than a predetermined reference value, and the voltage setting unit controls the voltage setting by the voltage setting unit. A parallel operation control device for inverters, characterized in that the voltage correction signal is added to a signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP719385U JPS61123644U (en) | 1985-01-22 | 1985-01-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP719385U JPS61123644U (en) | 1985-01-22 | 1985-01-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61123644U true JPS61123644U (en) | 1986-08-04 |
Family
ID=30485326
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP719385U Pending JPS61123644U (en) | 1985-01-22 | 1985-01-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61123644U (en) |
-
1985
- 1985-01-22 JP JP719385U patent/JPS61123644U/ja active Pending