JPS62139638U - - Google Patents
Info
- Publication number
- JPS62139638U JPS62139638U JP2750886U JP2750886U JPS62139638U JP S62139638 U JPS62139638 U JP S62139638U JP 2750886 U JP2750886 U JP 2750886U JP 2750886 U JP2750886 U JP 2750886U JP S62139638 U JPS62139638 U JP S62139638U
- Authority
- JP
- Japan
- Prior art keywords
- energization time
- head
- signal
- frequency
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000003079 width control Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案の通電時間幅制御回路の一実施
例を示したブロツク図、第２図は第１図の動作を
説明するタイミングチヤート、第３図は従来の通
電時間幅制御回路の一例を示したブロツク図、第
４図は第３図に示した回路の動作を説明するタイ
ミングチヤート、第５図は従来の通電時間幅制御
回路の他の例を示したブロツク図、第６図は第５
図に示した回路の動作を説明するタイミングチヤ
ートである。
１……分周回路、２……パターン発生器、３…
…コマンドレジスタ、４……データバス、５……
パターンマツチング回路、６，７……アンド回路
。
Fig. 1 is a block diagram showing one embodiment of the energization time width control circuit of the present invention, Fig. 2 is a timing chart explaining the operation of Fig. 1, and Fig. 3 is an example of a conventional energization time width control circuit. 4 is a timing chart explaining the operation of the circuit shown in FIG. 3, FIG. 5 is a block diagram showing another example of the conventional energization time width control circuit, and FIG. Fifth
3 is a timing chart illustrating the operation of the circuit shown in the figure. 1... Frequency dividing circuit, 2... Pattern generator, 3...
...Command register, 4...Data bus, 5...
Pattern matching circuit, 6, 7...AND circuit.
Claims (1)
れた分周信号の周期に基づいて感熱ヘツドへの通
電時間を制御するヘツドイネーブル信号を発生す
るヘツド通電時間制御回路において、外部から与
えられるデータが特定の組合せを持つた時に、前
記クロツク信号を分周する分周比を大きくするヘ
ツド通電時間切換信号を発生するヘツド通電時間
切換信号発生手段を設けたことを特徴とするヘツ
ド通電時間制御回路。 In a head energization time control circuit that divides the frequency of a clock signal to create a frequency-divided signal and generates a head enable signal that controls the energization time to the thermal head based on the period of the resulting frequency-divided signal, Head energization time control characterized in that a head energization time switching signal generation means is provided for generating a head energization time switching signal for increasing a frequency division ratio for dividing the clock signal when data has a specific combination. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2750886U JPS62139638U (en) | 1986-02-28 | 1986-02-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2750886U JPS62139638U (en) | 1986-02-28 | 1986-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62139638U true JPS62139638U (en) | 1987-09-03 |
Family
ID=30829608
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2750886U Pending JPS62139638U (en) | 1986-02-28 | 1986-02-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62139638U (en) |
-
1986
- 1986-02-28 JP JP2750886U patent/JPS62139638U/ja active Pending
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