JPH01179632U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the overall configuration of the pulse width modulator of the present invention, Fig. 2 is a timing chart showing the basic operation of the pulse width modulator of Fig. 1, and Fig. 3 is the actuator of Fig. 1. FIG. 4 is a flowchart of a control program in which the duty control pulse signal of No. 4 is expressed as a basic control pulse signal. FIG. 4 is a timing chart for explaining the generation of the control pulse signal by the program of FIG. 1... Pulse width modulator, 2... Reference clock pulse generator, 4... Actuator, 101...
Frequency dividing circuit, 102...PWM counter, 105...
...Central processing unit (CPU).

Claims (1)

[Scope of utility model registration request] In a pulse width modulator that generates a control pulse signal with a duty ratio according to control data supplied at each predetermined basic cycle, a required period for generating a signal representing a required period of the control pulse signal to control a controlled object. generating means, control duty ratio signal generating means for generating a signal representing a control duty ratio within the requested period, based on the signal representing the required period, the signal representing the control duty ratio, and the predetermined basic period; and the number of the predetermined basic cycles to be maintained in the on state or off state;
A pulse width modulator comprising: control duty ratio calculating means for determining a duty ratio within a fundamental period occurring subsequent to the fundamental period of the number of times.