JPS621374A - Vertical deflecting circuit - Google Patents

Abstract

PURPOSE:To use a general IC as a vertical output circuit by feeding back negatively a part of the output-side DC voltage to the input side of a DC level shift circuit inserted between a coupling capacitor and the input side of an IC for vertical output. CONSTITUTION:The output of an IC 16 for vertical oscillation is connected to the base of a pnp transistor TR 18 of a vertical driving circuit 17. The emitter of the TR 18 is connected to the base of an npn TR 14 of a DC level shift circuit 2 consisting of the TR 14 and a pnp TR 15. The collector of the TR 15 is connected to the input of a general IC 24 for vertical output, and the output of the IC 24 passes a vertical deflecting coil 25, and a part of the output is connected to the base of the TR 14 through DC component and AC component feedback circuits 31 and 35. If the DC voltage level down rate of the circuit 2 is reduced, the variance of the coil 25 is reduced though the input- side voltage of the circuit 2 is varied at channel switching or the like.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a vertical deflection circuit using an IC (integrated circuit) for the vertical output circuit. [Prior Art] In general, consumer devices such as television receivers are designed to be compact, have low power supply voltage and power consumption, are easy to handle, streamline assembly, save labor, and reduce costs.
is being developed. There are two types of ICs: general-purpose ICs that are constructed from relatively simple circuits for multi-purpose use, and dedicated ICs that are designed exclusively for a certain system to have sufficient functions necessary for that system. There is. General-purpose ICs have the advantage of being low in unit price because they are suitable for mass production of a small number of products, while special-purpose ICs have the disadvantage of being high in unit price because they are not suitable for mass production. Conventionally, general-purpose vertical output ICs used to configure vertical deflection circuits have a configuration in which the DC voltage level ratio between the input side and the output side is large (for example, the input DC voltage is about 1V, and the output midpoint voltage is about 12V). It had been. [Problems to be Solved by the Invention] Therefore, if the DC bias on the input side of the vertical output IC changes when switching channels or switching inputs,
The midpoint voltage (DC voltage level) on the output side fluctuates greatly,
There has been a problem in that vertical bouncing (hereinafter simply referred to as V-bouncing) occurs, in which the screen of the picture tube vibrates up and down. To prevent such V bouncing. Conventionally, a DC direct connection method was adopted in which the output side of the vertical oscillation circuit was directly connected to the vertical output IC via a vertical drive circuit, and a method was adopted in which the DC voltage level on the input side of the vertical output IC was increased. In either case, a dedicated vertical output IC must be used, resulting in an increase in price. The present invention has been developed in view of the above-mentioned problems, and it is possible to use a general-purpose IC as a vertical output IC, and to prevent V bouncing from occurring even if the DC voltage level on the input side fluctuates due to channel switching, etc. The present invention is intended to provide a vertical deflection circuit with a vertical deflection circuit. [Means for Solving the Problems] The present invention connects a vertical output IC to the output side of a vertical oscillation circuit via a vertical drive circuit and a coupling capacitor. In the vertical deflection circuit in which a vertical deflection current is caused to flow through the vertical deflection coil, a DC level shift circuit is inserted between the coupling capacitor and the vertical output IC, and the vertical It is characterized by negative feedback of a part of the DC voltage from the deflection coil side.

【Example】

FIG. 1 shows an embodiment of the present invention, in which (1) is a stabilized power supply circuit and (2) is a DC level shift circuit. The stabilized power supply circuit (1) is constructed in different ways. That is, the +24V DC power supply terminal (3) is grounded via the first resistor (4) and the first, second, and third Zener diodes (5), (6), and (7). Said first, second. Third Zener diode (5
) (6) and (7) each have a temperature coefficient of approximately -2mV.
/°C, OmV/'C1+211v/°C, and Zener voltages of approximately 3.9V, 6.8V, and 5.6V are used. The cathode side of the first Zener diode (5) is connected to the anode side via the second resistor (8) and the emitter/base of the first pnp transistor (9). The collector of is grounded. The cathode side of the first Zener diode (5) (that is, one end side of the second resistor (8)) is connected to a first voltage output terminal (11) via a smoothing capacitor (10).
The emitter side of the first transistor (9) (that is, the other end side of the second resistor (8)) is connected to the second voltage output terminal (13) via a smoothing capacitor (12). . The DC level shift circuit (2) mainly includes an npn type second transistor (14) and a pnp type third transistor (15) that constitute a first stage and a second stage amplifier circuit connected to the subsequent stage. It consists of: The collector of the second transistor (14) has a resistance of 3.3Ω (Re
t) to the first voltage output terminal (11), and its emitter is grounded via a resistor (Re□) of 3.3Ω. The base of the third transistor (15) is connected to the collector of the second transistor (14),
The emitter is connected to the second
It is connected to a voltage output terminal (13), and its collector is grounded via a resistor (Ra2) of 1Ω. (16) is a vertical oscillation IC that generates a sawtooth wave voltage of a predetermined frequency (60Hz) in synchronization with a vertical synchronization signal sent from a synchronization separation circuit (not shown).
The output side of (16) is the pnp of the vertical drive circuit (17)
The emitter of this fourth transistor (18) is connected to the +12V DC power supply terminal (20) via a 3.9Ω resistor (19), and the collector is grounded. The emitter of the fourth transistor (18) is connected to the base of the second transistor (14) of the DC level shift circuit (2) through a 33 μF coupling capacitor (21) and a 3.3 to Ω resistor (22). It is connected. The third transistor (
The collector of 15) is connected to the input side of a general-purpose vertical output IC (24), and the output side of this vertical output IC (24) is connected to a resistor via a vertical deflection coil (25) and a capacitor (26). It is grounded via (27). The connection point between the vertical deflection coil (25) and the capacitor (26) is. It is connected to the base of the second transistor (14) of the DC level shift circuit (2) via a DC component negative feedback circuit (31) consisting of resistors (28) (29) and a capacitor (30), and is connected to the base of the second transistor (14) of the DC level shift circuit (2). ) and resistance (27)
The connection point is connected to the second transistor (2) of the DC level shift circuit (2) via an AC component negative feedback circuit (35) consisting of resistors (32) (33) and a capacitor (34).
14). Next, the operation of the above embodiment will be explained. first. The operation of the stabilized power supply circuit (1) will be explained. Generally, the Zener voltage Vz (V) of a Zener diode
and the temperature coefficient γ (mV
/"C) is as shown in Figure 2. Therefore, let the voltages output from the first and second voltage output terminals (11) and (13) be V, , V2, respectively, and the difference between them is Assuming that V is V, these are expressed by the following formula: V 1 = Vzl + VZ2 + VZ3 (1
)V 2 = V @ Vz 1 + Vbe
(2) V==:Vl-V2=VZI Vbe
(3) Here, VzhVz2 and Vz3 represent the Zener voltages of the first, second, and third Zener diodes, and Vbe represents the base-emitter voltage of the first transistor (9). Considering the drift of v1, v2, and ■ due to temperature (shi), 'knee2+1V+O+(+21mV) =0...(4) Knee2+1V+O+(+21mV) =0...(4) Knee2+1V+O+(+21mV) =0...(4) Knee2+(-2mV)+(-2mV) =0...(5) ) At At At Press -2+wV -(-2mV) =O...(6) From the above equation (4) (s) (6), the stabilized power supply circuit (
1), the voltages V, , V output from the first and second voltage output terminals (11) (13), and the difference voltage V (
=Vt-V2) has extremely small fluctuations (drift) due to temperature. Next, (1) the bouncing prevention operation will be explained. D
The DC voltage level at point a on the input side of the C level shift circuit (2) is Va, the DC voltage level at point b on the output side is vb, and the vertical deflection coil ( 25) and the capacitor (26) at the connection point C is Vc, and the DC voltage level down rate of the DC level shift circuit (2) is Ld. If the DC level shift circuit (2) does not exist, the vertical output IC (24) and the negative feedback circuit (31) (3
When the DC voltage amplification factor according to 5) is set to 12, it becomes as follows. Therefore, if Ld is set to 176, V c
/Va=2, and even if Va fluctuates during channel switching, the Vc fluctuation is only affected by about twice, and bouncing can be kept to a minimum. Note that in the conventional example where the DC level shift circuit (2) is not used and point a is connected to point b, when Va fluctuates, Vc fluctuates by 12
It had become twice as big, and the bouncing was getting bigger. Specifically, according to equations (1) and (2), V 1 = 16
．． 3 (V), V 2 = 13.1 (V), Lenote, R
e 1 = Re 1 = 3.3 (KΩ), Rc 2 =
If Re 2 = 1 (KΩ), Va = 5. ．． 6
(V), Vb = 1 (V), V c = 12 (V
), and Vc /V a =1215.6'', 2.Next, the operation of the DC level shift circuit (2) will be considered in more detail.The collector current, collector voltage, and base voltage of the second transistor (14) are Ic the emitter voltage
1, Vcl, Vbe1, third transistor (15)
The collector current and base-emitter voltage of Ic2, Vb
When e2 is set, each formula holds true. Vcl = VI Re I I c 1
-(9)Vb=Rc2Ic2
-(11), so from these formulas Ice, IC2
, Vcl is deleted and rearranged to give , where Rc 1 ” Re s, Re 2
= Re 2, equation (12) becomes as follows. Vb=Va-(Vt-Vz)-(Vbet+Vbez)
-(13) That is, the DC level shift circuit (2
) is the sum of (Vl-Vz) and (Vbal+Vbe2). According to the above formula (3), VIV2 (=V) has zero temperature drift, so the above (
From equation 13), vb is not affected by the temperature drift of the power supply voltage (Vl, ■2). Furthermore, from equation (13) above, if you want V a = 5 (V), Vbe1
．． If Vbe2 is each 0.7v, Vb=1(V) is obtained by setting vt-Vz to 2.6(V) (that is, Ld=Vb/Va=115). [Effects of the Invention] As described above, the vertical deflection circuit according to the present invention includes a DC level shift circuit inserted between the coupling capacitor and the input side of the vertical output IC, and outputs to the input side of the DC level shift circuit. By negative feedback of a part of the DC voltage on the side, the DC voltage level on the input side of the vertical output IC is set to a predetermined value (for example, l. The DC voltage amplification factor of the entire IC was suppressed. Therefore, a general-purpose IC can be used as the vertical output circuit, and the D
It is possible to suppress v-bouncing due to variations in C bias.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram showing one embodiment of a vertical deflection circuit according to the present invention, and FIG. 2 is a characteristic diagram showing general characteristics of a Zener diode. (2)...DC level shift path, (16)...Vertical oscillation IC (vertical oscillation circuit), (17)...Vertical drive circuit. (21)...Coupling capacitor, (24)...
・Vertical output IC, (25)...Vertical deflection coil, (
31)...DC component negative feedback circuit.

Claims (2)

[Claims] (1) Through the vertical drive circuit on the output side of the vertical oscillation circuit,
In a vertical deflection circuit comprising a vertical output IC connected via a coupling capacitor and a vertical deflection current flowing through a vertical deflection coil by the output of the vertical output IC, the coupling capacitor and the vertical output IC
A vertical deflection circuit comprising: a DC level shift circuit inserted between the vertical deflection coils, and a part of the DC voltage from the vertical deflection coil side negatively fed back to the input side of the DC level shift circuit. (2) The DC level shift circuit is a patent in which two stages of transistor amplifier circuits with an amplification factor of approximately 1 are connected, the input and output are in the same phase, and the difference between the DC power supply voltages supplied to these transistor amplifier circuits is constant. A vertical deflection circuit according to claim 1.