JPH05259755A - Voltage current conversion circuit - Google Patents

Abstract

PURPOSE:To allow the circuit to be operated by an input voltage Vin from being almost at a ground potential and to surely output a current in response to the input voltage with less V/I conversion error. CONSTITUTION:A collector of a transistor (TR) Q1 receiving an input voltage Vin is connected to a R Q3 being a component of a current mirror circuit CM2 via TRs, Q5, Q2 and a resistor R1 being components of an impedance conversion circuit CM1. A current flowing to the TR Q5 is proportional to a current flowing to the TR Q2 by the current mirror CM3. Since the current flowing to the TRs Q1, Q5, Q2, Q3 is equal to each other, the base-emitter voltage of the TRs Q1, Q5, Q2, Q3 is cancelled and the conversion error is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage / current (V / I) conversion circuit used in a subtraction circuit composed of, for example, a semiconductor integrated circuit.

[0002]

2. Description of the Related Art FIG. 7 shows an example of a V / I conversion circuit used in a conventional subtraction circuit. In this V / I conversion circuit, the input voltage Vin is supplied to the base of the NPN transistor Q10, and the emitter is grounded via the resistor R10. The collector of the transistor Q10 is connected to the output terminal OUT1 to which a load (not shown) is connected, and the subtracted signal S is supplied to the output terminal OUT1 via the resistor R11. In the above structure, the collector current Iout of the transistor Q10 is Iout = (Vin−VBE10) / R10

(However, VBE10 is the voltage between the base and emitter of the transistor Q10, R10 is the resistance value of the resistor R10)
Therefore, a V / I conversion output corresponding to this current can be obtained. Therefore, the subtracted signal S is output to the output terminal OUT1.
It is possible to obtain the voltage obtained by subtracting the V / I conversion output from the.

FIG. 8 shows another example of the conventional V / I conversion circuit. In this V / I conversion circuit, P
The input voltage Vin is supplied to the base of the NP transistor Q11, and the emitter is grounded. The collector of the transistor Q11 is connected to the power source Vcc via a constant current source Ibias that generates a constant current of, for example, 50 μA, and is also connected to one end of the resistor R12. This resistance R1
The other end of 2 is connected to the collector and base of the transistor Q12 and the base of the transistor Q13. The emitters of these transistors Q12 and Q13 are grounded,
The collector of the transistor Q13 is connected to the output terminal OUT2, and the subtracted signal S is supplied to the output terminal OUT2 via the resistor R13. In the above configuration, the collector current Iout of the transistor Q13 is Iout = (Vin + VBE11-VBE12) / R12

(However, VBE11 and VBE12 are the voltages between the base and emitter of the transistors Q11 and Q12, and R1 respectively.
2 is the resistance value of the resistor R12), and a V / I conversion output corresponding to this current can be obtained. Therefore, the voltage obtained by subtracting the V / I converted output from the subtracted signal S can be obtained at the output terminal OUT2.

[0006]

By the way, in the case of the circuit shown in FIG. 7, since the emitter voltage of the transistor Q10 fluctuates, the usable range of the output voltage is significantly limited. In addition, the range of 0 to 0.7 V where the input voltage Vin corresponds to VBE of the transistor Q10 is a dead zone, and the voltage is not higher than this level, it does not operate. Further, in this circuit, since the VBE of the transistor Q10 changes depending on the temperature, the output current greatly changes accordingly.

Further, in the case of the circuit shown in FIG. 8, the use range of the output voltage is improved, and the input voltage Vin can be operated almost from the ground potential. However, in the case of this circuit, since the currents flowing through the transistors Q11 and Q12 are different, ΔVBE as the difference between VBE1 and VBE2 of these transistors Q11 and Q12 greatly fluctuates, causing an error in V / I conversion.

The present invention has been made in order to solve the above problems, and an object of the present invention is to allow the input voltage Vin to operate from substantially the ground potential and to make V /
An object of the present invention is to provide a voltage-current conversion circuit that has a small I conversion error and can reliably output a current according to an input voltage.

[0009]

In order to solve the above problems, the present invention provides a first transistor of a first conductivity type whose base is supplied with an input voltage and a current equivalent to the current flowing through the first transistor. An impedance conversion circuit configured by second and third transistors of a second conductivity type that supplies a current to one end of the resistor, and is connected to the other end of the resistor,
The second current that flows to the output end is the same as the current that flows in this resistor.
A first current mirror circuit composed of conductive type fourth and fifth transistors, and a second current mirror circuit for flowing a current proportional to the current flowing through the resistor to the second transistor are provided. ..

The present invention also relates to a first transistor of the first conductivity type whose base is supplied with an input voltage, and a first transistor of the first conductivity type.
A second transistor of a second conductivity type that supplies a current corresponding to the current flowing through the transistor to one end of the resistor, and a first current mirror circuit that causes a current proportional to the current flowing through the resistor to flow through the second transistor. , A base of which is connected to the first current mirror circuit and which is connected to a third transistor of a first conductivity type which flows a current according to a current flowing through the resistor, and a collector of the third transistor, There is provided a second current mirror circuit composed of fourth and fifth transistors of the second conductivity type which causes a current equivalent to the flowing current to flow to the output end.

[0011]

That is, the present invention is based on the first transistor,
VBE of these transistors is canceled by the second and third transistors forming the impedance conversion circuit and the fourth transistor forming the first current mirror circuit. Further, in the present invention, VBE of these transistors is canceled by the first and second transistors. Therefore, the output current does not fluctuate due to a temperature change, the V / I conversion error can be reduced, and the input voltage can operate from the ground potential.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a V / I conversion circuit used in a subtraction circuit. In the figure, the input voltage Vin is supplied to the base of the PNP transistor Q1. The collector of the transistor Q1 is grounded, and the emitter of the transistor Q1 is an NPN constituting the impedance conversion circuit CM1.
It is connected to the emitter of the transistor Q5. The base of the transistor Q5 is connected to the collector and the base of the NPN transistor Q2. The emitter of the transistor Q2 is connected via a resistor R1 to the collector and base of an NPN transistor Q3 which constitutes the current mirror circuit CM2, and the base of an NPN transistor Q4. The emitters of the transistors Q3 and Q4 are grounded, and the collector of the transistor Q4 is connected to the output terminal OUT3 to which a load (not shown) is connected. The subtracted signal S is supplied to the output terminal OUT3 via the resistor R2.

On the other hand, the collector of the transistor Q5 is connected to the collector of a PNP transistor Q6 which constitutes a third current mirror circuit CM3 as a current source. The base of the transistor Q6 is connected to the base of the PNP transistor Q7 and the emitter of the PNP transistor Q8. The collector of the transistor Q8 is grounded, and the base is connected to the collectors of the transistors Q7 and Q2. The emitters of the transistors Q6 and Q7 are connected to the power source Vcc.

Further, the collector of the transistor Q6 is connected to the collector of a PNP transistor Q9 which constitutes the start circuit ST. The reference potential Vb is supplied to the base of the transistor Q9, and the emitter is the resistor R3.
Is connected to the power source Vcc via. The start circuit ST supplies a minute current to the transistor Q1 when the third current mirror circuit CM3 is off.

In the above structure, the transistors Q6, Q
The third current mirror circuit CM3 as a current source constituted by the transistors 7 and Q8 causes a current equivalent to the current flowing in the transistor Q2 to flow in the transistor Q5. Therefore, the currents flowing through the transistors Q5 and Q2 forming the impedance conversion circuit CM1 are equal, and the voltage generated in the resistor R1 is substantially equal to the input voltage Vin. Further, the currents flowing through the transistor Q2 and the transistors Q3 and Q4 are equal, and the collector current Iout of the transistor Q4 is Iout = (Vin + VBE1 + VBE5-VBE2-VBE3) / R1.

(However, VBE1, VBE2, VBE3, VBE5
Are the base-emitter voltages of the transistors Q1, Q2, Q3, and Q5, respectively, and R1 is the resistance value of the resistor R1. Since the currents flowing through the transistors Q1, Q2, Q3, and Q5 are equal, the above equation is Iout = Vin / R1

Thus, a V / I conversion output corresponding to this current can be obtained. Therefore, the voltage obtained by subtracting the V / I conversion output from the subtracted signal S can be obtained at the output terminal OUT3.

According to the above embodiment, the transistor Q1,
Since the currents flowing through Q2, Q3, and Q5 are equal, the base-emitter voltage of the transistors Q1, Q2, Q3, and Q5 can be canceled. Therefore, it is possible to suppress the fluctuation of the output current due to the temperature change.

FIG. 2 shows changes in the output current with respect to changes in temperature. The transistor Q in this embodiment is shown in FIG.
4 shows the current flowing through the transistor Q10, the current flowing through the transistor Q10 shown in FIG. 7, and the current flowing through the transistor Q13 shown in FIG. From the figure, it can be seen that in the case of this embodiment, the fluctuation of the output current with respect to the temperature change is greatly improved. In addition, the transistor Q6 forming the constant current source is
Since an electric current proportional to the electric current flowing through the resistor R1 flows, the output current is not limited with respect to the input voltage Vin.

FIG. 3 shows the relationship between the output current and the input voltage Vin. The current flowing through the transistor Q4 in this embodiment, the current flowing through the transistor Q10 shown in FIG. 7, and the current flowing through the transistor Q13 shown in FIG. Is shown. Since the conventional example shown in FIG. 8 uses the constant current source Ibias of 50 μA constant, the transistor Q13
A current of 50 μA or more does not flow through the device. Further, the range of use of the input voltage is 0.7 V or more in the case of the conventional example shown in FIG. 7, but in the case of this example, it can be used from the ground potential (Vcc when the polarities are opposite).

Further, when considering a subtraction circuit using this V / I conversion, since the emitter current of the transistor Q1 and the collector current of the transistor Q4 are almost the same, V _BE is the same, and the fluctuation of the input voltage and the output voltage. Is small.

FIG. 4 shows the characteristics (Vin-
(Vs-V (OUT3))) (Vs; voltage of subtracted signal S), and the characteristic (Vin- (Vs-V (OUT
2))) is shown. The transistor Q11 shown in FIG.
Although the currents flowing in Q13 are different from each other, it is understood that in this embodiment, the emitter current of the transistor Q1 and the collector current of the transistor Q4 are almost the same, so that the characteristics are greatly improved compared to the conventional case. further,
Considering a subtraction circuit using this V / I conversion, the output voltage range can be used from approximately the ground potential to the power supply potential Vcc.

FIG. 5 shows the range of the output voltage in the case of considering the subtraction circuit using this V / I conversion. VOUT3 shows the characteristic according to this embodiment, VOUT1 shows the characteristic of the conventional example shown in FIG. 7, and VOUT2 shows the characteristic of the conventional example shown in FIG. In the case of the conventional example (VOUT1) shown in FIG. 7, it can be used only up to about 0.7V lower than the input voltage Vin, but in the case of this embodiment, it can be seen that it can be used from about the ground potential to the power supply potential Vcc. FIG. 6 shows a second embodiment of the present invention and shows a V / I conversion circuit used in a subtraction circuit.

In the figure, the input voltage Vin is supplied to the base of the PNP transistor Q1. The collector of this transistor Q1 is grounded, and the emitter is NPN.
It is connected to the base of the transistor Q2. The emitter of the transistor Q2 is grounded via the resistor R1.

On the other hand, the collector of the transistor Q1 is connected to the collector of a PNP transistor Q6 which constitutes a current mirror circuit CM3 as a current source.
The base of this transistor Q6 is a PNP transistor Q
7 and Q14 and the emitter of the PNP transistor Q8. The collector of the transistor Q8 is grounded, and the base is connected to the collectors of the transistors Q7 and Q2. The emitters of the transistors Q6, Q7 and Q14 are connected to the power source Vcc.

The collector of the transistor Q14 is an NPN transistor Q which constitutes a current mirror circuit CM2.
3 collector, base, and NPN transistor Q4
Connected to the base of. These transistors Q3,
The emitter of Q4 is grounded, and the collector of the transistor Q4 is connected to the output terminal OUT3 to which a load (not shown) is connected. The subtracted signal S is supplied to the output terminal OUT3 via the resistor R2.

Further, a PNP transistor Q constituting a start circuit ST is provided at the collector of the transistor Q6.
Nine collectors are connected. This transistor Q9
The reference potential Vb is supplied to the base of the, and the emitter is connected to the power source Vcc through the resistor R3.

In the above structure, the transistors Q6, Q
The constant current source formed by Q7 and Q8 supplies a current equivalent to the current flowing in the transistor Q2 to the transistors Q1 and Q8.
It is flowing to 14. Therefore, the transistors Q1 and Q
2 and the currents flowing through the transistors Q3 and Q4 are equal, and the collector current Iout of the transistor Q4 is Iout = (Vin + VBE1−VBE2) / R1.

(VBE1 and VBE2 are the voltages between the base and emitter of the transistors Q1 and Q2, respectively, and R1 is the resistance value of the resistor R1). Since the currents flowing through the transistors Q1 and Q2 are equal,

Thus, a V / I conversion output corresponding to this current can be obtained. Therefore, the voltage obtained by subtracting the V / I conversion output from the subtracted signal S can be obtained at the output terminal OUT3. The same effects as those of the first embodiment can be obtained by the above embodiment. The present invention is not limited to the above-mentioned embodiments, and it goes without saying that various modifications can be made without departing from the spirit of the invention.

[0032]

As described above in detail, according to the present invention, the input voltage Vin can be operated substantially from the ground potential, the V / I conversion error is small, and the current according to the input voltage is surely output. It is possible to provide a voltage-current conversion circuit capable of doing so.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a change in output current with respect to a temperature change.

FIG. 3 is a characteristic diagram showing a relationship between output current and input voltage.

FIG. 4 is a characteristic diagram showing a relationship between an input voltage and an output voltage.

FIG. 5 is a characteristic diagram showing a range of output voltage with respect to input voltage.

FIG. 6 is a circuit diagram showing a second embodiment of the present invention.

FIG. 7 is a circuit diagram showing a conventional V / I conversion circuit.

FIG. 8 is a circuit diagram showing a conventional V / I conversion circuit.

[Description of symbols] Vin ... Input voltage, Q1, Q6, Q7, Q14 ... PNP transistor, Q2, Q3, Q4, Q5 ... NPN transistor, CM1, CM2, CM3 ... Current mirror circuit,
OUT3 ... Output terminal.

Claims (2)

[Claims] 1. A first-conductivity-type first transistor whose base is supplied with an input voltage, and a second-conductivity-type second transistor which supplies a current equivalent to the current flowing through the first transistor to one end of a resistor. An impedance conversion circuit constituted by a third transistor, and a second conductivity type fourth and fifth transistor connected to the other end of the resistor and having a current equivalent to the current flowing in the resistor flowing to an output end. A voltage-current conversion circuit comprising: a configured first current mirror circuit; and a second current mirror circuit which causes a current proportional to a current flowing through the resistor to flow through the second transistor. 2. A first-conductivity-type first transistor whose base is supplied with an input voltage, and a second-conductivity-type second transistor which supplies a current corresponding to a current flowing through the first transistor to one end of a resistor. Transistor, a first current mirror circuit that causes a current proportional to the current flowing through the resistor to flow through the second transistor, and a base whose current is connected to the first current mirror circuit and which corresponds to the current flowing through the resistor. And a second transistor of the second conductivity type, which is connected to the collector of the third transistor and flows a current equivalent to the current flowing through the resistor to the output end. And a second current mirror circuit configured as follows.