JP2829773B2 - Comparator circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a comparator circuit that operates normally with a low power supply voltage and a reference voltage even when an input voltage to be compared fluctuates over a wide range.

[Conventional technology]

FIGS. 2, 3, 4, and 5 show examples of conventional comparator circuits, respectively.

FIG. 2 shows an input terminal 8 to which an input voltage is applied to the base of _one PNP transistor Q1 of a differential circuit whose emitters are connected to a power supply via a constant current circuit 1, is connected the input terminal 9 of the base to the reference voltage of the other PNP transistor Q ₂ is applied, the collector of Q ₁ is grounded, the emitter collector Q ₂ 'is is grounded PN
The collector of the P transistor Q ₈ is connected to the collector and base, and the collector of the PNP transistor Q ₉ connected to Q ₈ and the current mirror is connected to the power supply via the constant current circuit 2, and the output terminal 10 is connected to this collector. It is a thing.

In this circuit, the input voltage is V _IN , the reference voltage is V _REF , and Q _8
Assuming that the base-emitter forward voltage of _VBE8 is _VBE8,
When ≦ V _REF <V _IN , Q ₈ and Q ₉ are turned on, and the output voltage V _OUT
Becomes “L” level.

Conversely, when V _IN <V _REF , Q ₈ and Q ₉ are turned off, and the output voltage V _OUT goes to “H” level.

The one shown in FIG. 3, in which the transistor Q ₁₀ of the current mirror circuit is connected to the collector of the transistor to Q ₁ side based on the input voltage is applied in a differential circuit.

In this circuit, when the base-emitter forward voltage of Q ₁₀ and V _BE10, when _{V BE10 ≦ · V IN <V} REF, Q 10, Q 11
Turns on, the output voltage V _OUT goes to “L” level,
When V _IN > V _REF , Q ₁₀ and Q ₁₁ are turned off, and the output voltage V
_OUT becomes “H” level.

In the circuit shown in FIG. 4, when V _IN > V _REF , Q ₁ , Q ₁₂ , Q
_13, Q ₁₈ is turned _{on, Q 2, Q 14, Q} 15, Q 16, Q 17 is turned off, the output voltage V _OUT becomes "L" level.

Conversely, when V _IN > V _REF , Q ₁ , Q ₁₂ , Q ₁₃ , and Q ₁₈ are off and Q
₂ , Q ₁₄ , Q ₁₅ , Q ₁₆ , Q ₁₇ are turned on and the output voltage V _OUT becomes “H”
Become a level.

In the circuit shown in FIG. 5, when V _IN <V _REF , Q ₂₀ and Q ₂₅ are off, and Q ₁₉ , Q ₂₁ , Q ₂₂ , Q ₂₃ , and Q ₂₄ are on, and the output voltage V _OUT
Becomes “L” level. Conversely, when V _IN <V _REF , Q ₁₉ ,
Q ₂₀ , Q ₂₄ , Q ₂₅ are turned on, Q ₂₁ , Q ₂₂ , Q ₂₃ are turned off, and the output voltage goes to “H” level.

[Problems to be solved by the invention]

In the circuit shown in FIG. 2, the power supply voltage V _{CC is changed} to V _REF + V _BE2 + V
There is an advantage that it can be as low as _sat1 , but _under the condition of V _REF <V _BE8 , even if V _IN > V _REF , Q ₈ and Q ₉ are not turned on and the output voltage V _OUT becomes “L” There was a drawback that it did not become. V _BE2 and V _BE8 are base-emitter forward voltages of Q ₂ and Q ₈ , respectively, and V _sat1 is a saturation voltage of the transistor of the constant current circuit 1.

In the circuit shown in FIG. 3, the power supply voltage V _{CC is changed} to V _REF + V _BE2 + V
There is an advantage that it can be as low as _sat1 , but when V _IN <V _BE10 , Q ₁₀ and Q ₁₁ are not turned on even if V _IN <V _REF, and the output voltage V _OUT becomes “L”. There was a drawback that it did not become. V _BE10 is the base-emitter forward voltage of Q _10.

In the circuit shown in FIG. 4, the input voltage V _IN and the reference voltage V _REF
Has the advantage of operating at a voltage close to 0V, but the power supply voltage V
There is a drawback that the function does not work unless _CC is higher than V _REF + V _BE16 + V _BE17 + V _sat1 . V _BE17 and V _BE16 are respectively
This is the forward voltage between the base and the emitter of Q ₁₇ and Q ₁₆ .

In the circuit shown in FIG. 5, the input voltage V _IN and the reference voltage V _{REF
Operates at a} low voltage (approximately V _sat7 ), and furthermore, the power supply voltage V _{CC is set} to V _REF + V _BE24 + V _sat6 or V _REF + V _BE21 + V
There is an advantage that it can be as low as _BE23 , but V _IN is V _CC −V _sat5
Higher conditions, even if V _IN > V _REF , Q
_20, Q ₂₅ is not turned on, the output voltage V _OUT has a disadvantage in that not to "H". V _BE21 , V _BE23 , V _BE24
Q ₂₁ , Q ₂₃ , Q ₂₄ forward voltage between base and emitter, V _sat5 , V
_sat6 and V _sat7 are the saturation voltages of the transistors of the constant current circuits 5, 6, and 7, respectively.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described drawbacks, and has as its object to provide a comparator circuit that operates normally with a low reference voltage and a low power supply voltage and with a wide range of input voltages.

[Means for solving the problem]

In order to achieve the above object, the present invention provides a differential circuit in which an emitter of a transistor Q1 to which an input voltage is applied to a base and an emitter of a transistor Q2 to which a reference voltage is applied to a base are connected to a power supply via a constant current circuit 1. The collector of the transistor Q1 is grounded,
The collector of Q2 is connected to the collector of transistor Q3, and the base of transistor Q3 is connected to the base and collector of transistor Q4 via resistor R2 and to the base of transistor Q5 via resistor R2, The emitter of the transistor Q3 is grounded via a resistor R1 and connected to the emitter of the transistor Q5. The collector of the transistor Q4 is connected to a power supply via a constant current circuit 4, and the emitter of the transistor Q4 Is grounded via a resistor 3, the collector of the transistor Q5 is connected to the collector and gate of the transistor Q6, and is connected to the base of a transistor Q7 connected to the transistor Q6 and a current mirror structure,
The emitters of the transistors Q6 and Q7 are connected to a power supply, and the collector of the transistor Q7 is grounded via a constant current circuit 3 and an output is taken out.

〔Example〕

 FIG. 1 shows an embodiment of the present invention.

In the figures, the same reference numerals as those in FIGS. 2, 3, 4 and 5 denote the same or corresponding elements, 1, 3 and 4 are constant current circuits, 8, 9 are input terminals, and 10 is output _{terminal, Q 1, Q 2, Q} 6, Q 7
Is a PNP transistor, Q ₃ , Q ₄ , Q ₅ is an NPN transistor, R ₁ , R
₂ and R ₃ are resistors.

In this circuit, when V _In <V _REF , Q ₁ is on and Q ₂ , Q ₃
Is turned off. At this time, the collector current of Q5 is
If equal the resistance of R3, the collector current of Q _4, i.e., equal to the current value of the constant current circuit 4. At this time, Q7
Is also equal to the current value of the constant current circuit 4.

When V _In > V _REF , Q1 is off and Q2 and Q3 are on. As a result, the emitter potential of Q5 rises by (current value of constant current circuit 1) × (resistance of resistor R1), and the collector current value of Q5 becomes smaller than the current value of constant current circuit 4; The collector current value also decreases. The current value of the constant current circuit 3 is smaller than the current value of the constant current circuit 4, and V _In > V
_{If REF} is set higher than the collector current of Q7, V
_{When In} <V _REF , the collector current of Q7 is equal to the current value of the constant current circuit 4, so that the collector current of Q7 becomes larger than the current value of the constant current circuit 3, and V _OUT becomes “H” level. .
When V _In > V _REF , the collector current of Q7 becomes smaller than the current value of constant power supply circuit 3, and V _OUT becomes “L” level.

Then, the device operates with an input voltage in a wide range of 0 ≦ V _IN and normally operates with a low reference voltage such as V _sat3 + V _R1 ≦ V _REF . Further, the power supply voltage V _CC only needs to be about V _REF + V _BE2 + V _sat1 , and it operates with a low power supply voltage. V _sat3 and V _sat1 are respectively Q ₃ , the saturation voltage of the transistor of the constant current circuit 1,
V _BE2 is the base-emitter forward voltage of Q _2, V _R1 the resistance R
_The voltage drop due to ₁ .

〔The invention's effect〕

As described above, according to the present invention, normal operation can be performed even in the case of a low power supply voltage, a reference voltage, and a wide range of input voltage.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, and FIGS.
FIG. 4, FIG. 4, and FIG. 5 are circuit diagrams each showing an example of this type of conventional comparator circuit. 1,3,4 ...... low current circuit, 8,9 ...... input terminal, 10 ...... output _{terminals, Q 1, Q 2, Q} 3, Q 4, Q 5, Q 6, Q 7 ...... transistor, R ₁ , R ₂ , R
₃ ...... Resistance. In the drawings, the same reference numerals indicate the same or corresponding components.

Claims (1)

(57) [Claims] 1. A differential circuit in which the emitter of a transistor Q1 to which an input voltage is applied to a base and the emitter of a transistor Q2 to which a reference voltage is applied to a base are connected to a power supply via a constant current circuit 1. The collector of the transistor Q2 is connected to the collector of the transistor Q3.The base of the transistor Q3 is connected to the base and the collector of the transistor Q4 via a resistor R2, and is connected via a resistor R2. Connected to the base of transistor Q5, the emitter of transistor Q3 is grounded via resistor R1 and connected to the emitter of transistor Q5, and the collector of transistor Q4 is connected to the power supply via constant current circuit 4. Connected, the emitter of the transistor Q4 is grounded via the resistor 3, and the transistor Q5 is connected to the ground. The collector is connected to the collector and the gate of the transistor Q6, and the transistor Q7 is connected to the transistor Q6 in a current mirror structure.
The emitter of each of the transistors Q6 and Q7 is connected to a power supply, and the collector of the transistor Q7 is grounded via a constant current circuit 3 and an output is taken out. circuit.