JPH0432312A - Comparator circuit - Google Patents

Abstract

PURPOSE:To normally operate the comparator circuit at a low reference voltage, a low power supply voltage and an input voltage of a wide range level by connecting a constant current circuit and transistors(TRs) in a specific circuit configuration. CONSTITUTION:The computer circuit consists of TRs Q1-Q7 and resistors R1-R3. The circuit is so constituted that in the case of VIN<VREF, the TR Q1 is turned on and the TRs Q2, Q3 are turned off, and in the case of VIN>VREF, the TR Q1 is turned off and the TRs Q2, Q3 are turned on. That is, when the TRs Q2, Q3 are turned on, a base current flows to the TR Q3, the base current of the TR Q5 is decreased more than that in the case of VIN<VREF, and the collector current of the TR Q7 is decreased, when the current of a constant current circuit 3 is set between the collector current of the TR Q7 in the case of VIN< VREF and that in the case of VIN>VREF, a level VOUT goes to an H level in the case of VIN<VREF, and the level VOUT goes to an L level in the case of VIN>VREF. Thus, the comparator circuit is normally in operation even at a low reference voltage, a low power supply voltage and an input voltage of a wide range level.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a comparator circuit that operates normally with a low power supply voltage and a reference voltage even if the input voltage to be compared varies over a wide range.

[Conventional technology]

FIG. 2, FIG. 3, FIG. 4, and FIG. 5 each show examples of conventional comparator circuits.

The one shown in Fig. 2 is one PNP of a differential circuit whose respective emitters are connected to the power supply via a constant current circuit
) An input terminal 8 to which an input voltage is applied is connected to the base of the transistor Q, and an input terminal 9 to which a reference voltage is applied to the base of the other PNP transistor Q2 is connected to the base of the transistor Q.
The collector of transistor Q8 is connected to the base, the collector of transistor Q8 is connected to the base of transistor Q8, and the collector of Q, is connected to the base of transistor Q8, and the collector of Q, is connected to the base of transistor Q, and P is connected in a current mirror configuration with Q.
NP) The collector of transistor Q is connected to a power supply via a constant current circuit 2, and the output terminal 10 is connected to this collector.

In this circuit, the input voltage is VIN and the reference voltage is ■l! 4
, the base-emitter forward voltage of Qll is VIEII
Then, VBEII ≦V*iF< V IN (7
), Q,,Q, turns on and the output voltage becomes ■. When I, A goes to "L" level, conversely, when V,, 4<V□, Q,, Q, turns off, and the output voltage ■. LIT becomes "H" level.

What is shown in FIG. 3 is a transistor Q of a current mirror circuit connected to the collector of the transistor Q1 on the side to which the input voltage is applied to the base of the differential circuit. are connected.

In this circuit, the forward direction between the base and emitter of Q + O is
If the forward voltage is VIIEIO, VIEIO≦V IN
< When VIEF, Q. , QIl is turned on,
Output voltage■. U.

becomes the P L′” level, and conversely, V IN > V RE
When it's F, it's Q. +QI+ turns off, and the output voltage ■
. LIT becomes "H'" level.

In the circuit shown in FIG. 4, when VIN>VREF, Q,
,Q+z,Q,3. Q, is on, Q,,Q,,.

Qrs, QI&lQ+7 are turned off, and the output voltage vout becomes L'' level.

Conversely, when ■XN>V□, Q + + Q+z
.

Q +3+ Q+e off, Qz + Q141
QISI QI41Ql is turned on and the output voltage becomes ■. 0A becomes H” level.

In the circuit shown in FIG. 5, when VIN<VIEF, Qt
o, Qz5 is off% Q l 9 T Q z +
+ Q z z + Q t s rQts turns on, and the output voltage becomes ■. . , becomes "L" level. Conversely, when VIN<VoF, QI9+Qz o + Q
Z a! Q t s is on, Q t I+
Q t z +Q z s is turned off, and the output voltage becomes ``H'' level.

[Problem to be solved by the invention]

In the circuit shown in FIG. 2, the power supply voltage VCC is set to V REF+
There is an advantage that it can be made as low as Vi+tz +Vsst+, but under the condition VREF <VIE8 (7), even if VI, l> V ll, Q, , Q, will not turn on, and the output voltage will become ■. 0. There was a drawback that it did not become "L". ■□2. V□8 is (h, Qs
The base-emitter forward voltage, ■□, is the saturation voltage of the transistor of the constant current circuit 1.

In the circuit shown in Figure 3, the power supply voltage VCC is
There is an advantage that it can be as low as IE□+V s+atl, but when the condition is V IN < VIIEIO,
Even if is<V*iy, Q,. , QII is not turned on, and the output voltage VOIIT is not set to "L".

VB□. Q. is the base-emitter forward voltage of .

In the circuit shown in FIG. 4, the input voltage VIN, the reference voltage V
JIEF has the advantage of operating at voltages close to O■, but
Power supply voltage VCC is v*tr + VIEI6+VllE
+? It has the disadvantage that it does not function unless the voltage is higher than +Vsat+. ■□51. ■. , 6 are each Q I
? IQ is the base-emitter forward voltage of Ib.

In the circuit shown in FIG. 5, the input voltage VIN, the reference voltage Vj
It operates even when lEF is at a low voltage (approximately Vsmt?), and moreover, the supply voltage VCC can be reduced to V REF + V WE! 4
+ V sat & or VIIEF + vgEz+
+ VmE as low as 23 (there is an advantage that it can be done, but VIN
When VCC-VsatS is higher than VCC-VsatS, Q2゜rQts does not turn on even if V IN > V REF, and the output voltage VOIIT does not become 11H''.■.Z++■1 □8.■.24 is the base-emitter forward voltage of Qz lr Q t s + Q t 4, V ss + VSat, respectively.
&vV mat? are the saturation voltages of the transistors of the constant current circuits 5, 6.7, respectively.

The present invention has been made to eliminate each of the above-mentioned drawbacks, and an object of the present invention is to provide a comparator circuit that operates normally with a low reference voltage and power supply voltage, and moreover, over a wide range of input voltages.

[Means to solve the problem]

In the comparator circuit of the present invention, the collector of the transistor Q on the side to which the input voltage of the differential circuit is applied is grounded,
The collector of transistor Q2 on the side to which the reference voltage is applied is connected to the collector of transistor Q whose emitter is grounded via resistor R5, and the base of Q3 is connected to resistor R.
A transistor whose base and collector are connected to a power supply through a constant current circuit and whose emitter is connected to the base of a grounded transistor Q4 through a resistor R3, and whose emitter is connected to the emitter of Q3. Connected to the base of Q5, the above Q, and Q.

The emitter of Q is grounded through a resistor R9, and the collector of Q is a transistor Q6 whose emitter is connected to the power supply.
The collector of the transistor Q is connected to the collector and base of the transistor Q, which is connected to the collector of the transistor Q in a current mirror configuration, and the collector of the transistor Q is grounded through a constant current circuit, and the output is taken out from the collector of the transistor Q. .

〔Example〕

FIG. 1 shows an embodiment of the invention.

In the figures, the same symbols as those in FIGS. 2, 3, 4, and 5 indicate the same or equivalent parts, 1.3.4 is a constant current circuit, 8 and 9 are input terminals, and 10 is a constant current circuit. Output terminal, Q,
,Q, ,Q, ,Q, are PNP transistors, Q! ,Q
4. Qs is an NPN) transistor, and R, , R, , R, are resistors.

In this circuit, when V, N<V□, Q is on;
,,Q, are turned off, and when V I N > VIEF, Q is turned off and Q,,Q, is turned on.

When Q,,Q, is turned on, the base current flows through,Q,, so the base current of,Q,reduces,■,〈■,
Compared to IEF, the base current of Q is reduced and the collector current of Q is small.

The current value of constant current circuit 3 is V, N<V, when F and V,
If it is set between the collector current values of Q when N<V, F, then V, N<V, 1. When ■.ゎ, is "H" level, and when V, N < V□, ■. UT becomes "L" level.

Moreover, it operates in a wide range of input voltages of 0≦v1N, and, moreover, ■. It operates normally at a low reference voltage such as 10V□≦V IIEF. Also, the power supply voltage vce is V+tz
y + VBtz + V□ (operates with a low power supply voltage. V $11t3+ vsat+
are Qs, the saturation voltage of the transistor of constant current circuit 1, and ■. 2 is the forward voltage between the base and emitter of Q2, ■
1 is the voltage drop caused by the resistor R1.

〔Effect of the invention〕

As explained above, according to the present invention, low power supply voltage,
It will operate normally even in the case of a reference voltage and a wide range of input voltages.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figures 2 and 3 are circuit diagrams showing one embodiment of the present invention.
4 and 5 are circuit diagrams showing examples of conventional comparator circuits of this type. 1.3.4... Constant current circuit, 8.9... Input terminal,
i o...output terminal, QII Qz, Q31 Q4
1 QSIQ&, QF...transistor, R+,
Rz, R3...resistance. Note that the same reference numerals in each figure indicate the same or equivalent parts. Patent applicant: New Japan Radio Co., Ltd.

Claims (1)

[Claims] Transistor Q on the side to which the input voltage of the differential circuit is applied
The collector of transistor Q_2 on the side to which a reference voltage is applied is connected to the collector of transistor Q_3 whose emitter is grounded via resistor R_1, and the base of Q_3 is connected to the collector via resistor R_2. is connected to the power supply via a constant current circuit, the emitter is connected to the base of a transistor Q_4 which is grounded via a resistor R_3, and the emitter is connected to the base of a transistor Q_5 which is connected to the emitter of Q_3, and the above The emitters of Q_3 and Q_5 are grounded through a resistor R_1, and the collector of Q_5 is connected to the collector and base of transistor Q_6 whose emitter is connected to the power supply, and the collector of transistor Q_7 which is connected to Q_6 in a current mirror configuration. is grounded via a constant current circuit, and the output is taken out from the collector of Q_7.