JPH03169107A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To avoid an error of an input and output current due to the Early's effect by adding a voltage division circuit comprising two series resistors for deciding a base voltage of a 1st transistor(TR) to a conventional three-transistor current mirror circuit. CONSTITUTION:Two resistors R1, R2 are connected in series between a positive voltage power supply V+ at a power terminal 1 and an emitter of a transistor(TR) Q3 and a common connecting point between the resistors R1, R2 is connected to a common base connecting point of TRs Q1, Q2. Since the collector.emitter voltage of the TR Q1 at the input side is accurately decided by the ratio of the two resistors R1, R2 only, the collector.emitter voltage of the TR Q1 is made equal to that of the output TR Q2 by having only to select the resistance of the resistors R1, R2 properly. Thus, the error in the input output current by the Early's effect is not caused.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a current mirror circuit, and particularly to a current mirror circuit used in a bibolar transistor integrated circuit. [Prior art] Figure 2 shows an example of a conventional current mirror circuit. As is well known, a current mirror circuit is a constant current source circuit that uses the output resistance of a bipolar transistor. Referring to FIG. 2, two PNP} transistors Ql,
The bases of Q2 are commonly connected, and the emitters of Q2 are connected to the positive voltage power supply V+ of the power supply terminal 1. The emitter of yet another PNP transistor Q3 is connected to the commonly connected bases of Ql and Q2, and the base is connected to the commonly connected base of Q1.
The collector of Ql is connected to the input terminal 2, and the collector of Q2 is connected to the output terminal 3.

This is a well-known three-transistor current mirror circuit.
The relationship between input current IIN and output current 10LIT is shown by the following equation. I IN= r out [(2/β(β+1
) } + 1 1-1 Here, β is the current amplification factor of the transistor. From this, the input/output current error IER is as follows. I ER = 2 r OUT / β (β + 1)...
・・・・・・・・・・・・・・・・・・・・・2 Therefore, if β is sufficiently large, Itλ becomes extremely small and can be ignored. [Problems to be Solved by the Invention] The conventional current mirror circuit described above has an input/output current error as shown in equation 2, and this alone is not a big problem. However, although Equation 2 only considers β as an error factor, in reality, it is necessary to take into account the round effect of the transistor as well. The output resistance of a bibolar transistor is due to the fact that the width of the depletion layer changes depending on the voltage applied to the collector-base junction, so even if the emitter-base junction voltage or base current is constant, the collector current changes. has a finite value. This is the ar effect. This output resistance is approximately inversely proportional to the collector current, so the product of both is constant. This product is called the earth voltage, and for PNP transistors used in general analog integrated circuits, it has a value of about several tens of volts.

Next, we will explain the error when considering the earth voltage. The collector current IC of the transistor is expressed by the following equation in consideration of the earth voltage V^.

I c = I s { exP(Vi
+g/Vr) ) (1+Vci/VA)---
・3 Here, I. is the saturation current, VBE is the base-emitter voltage, V is the thermal voltage, and VCE is the collector-emitter voltage.

In FIG. 2, if β of the transistor is sufficiently large and the current error due to β expressed by the 2 equations can be ignored, the input/output current is expressed by the following equation.

? rI1 = I ct = I s1 (exp(VB
Et/Vt)} (1+VcE1/VA)Iout=
I C2= I 52 { eXP(Vmi2/Vr
)} (1+VCE2/VA) where ICI, r.
l, vagx, VCE 1, is the collector current, saturation current, base-emitter voltage, collector-emitter voltage of Q1, IC2, IS2, VIE ■, V'C E 2
, represent the collector current, saturation current, base-emitter voltage, and capacitor-emitter voltage of Q2, respectively. Therefore, the relationship between the input and output currents considering the earth voltage is expressed by the following equation. fou ding/I r s= (1+Vctz/V^)/(
1+Vcts/VA) - - - - As is clear from formula 44, the collectors and
If the emitter voltages are equal, there will be no error due to the earth voltage V^. However, in the circuit shown in FIG. 2, the collector-emitter voltage VCtl of Q1 is approximately 0.7V since it is the sum of the base-emitter voltages of Q3 and Q1.
+0.7V=1.4V, whereas the collector-emitter voltage VCE2 of Q2 is determined by external factors such as load conditions, and therefore generally takes a different value.

For example, VA = 50 V, Vciz = 5
Since VCEI is 1.4V as mentioned above, the input/output current ratio is 1.07 from equation 4, which is 7.
% error will occur.

As explained above, the conventional current mirror circuit shown in FIG. 2 has the disadvantage that errors in input and output currents occur due to the rounding effect.

[Means to solve the problem]

The current mirror circuit of the present invention includes first and second transistors whose bases are commonly connected to each other and whose emitters are respectively connected to one of different power supply terminals, and whose base is connected to the collector of the first transistor. and the collector is connected to the other power terminal of the different power terminals.
a first resistor connected between a base common connection point of the first and second transistors and a power supply terminal to which the emitters of the first and second transistors are connected; , a second resistor connected between a base common connection point of the first and second transistors and an emitter of the third transistor, the collector of the first transistor being an input terminal; The collector of the second transistor is used as an output terminal.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIG. 1 is a circuit diagram showing one embodiment of the present invention. 1st
Referring to the figure, two PNP} transistors Q1 and Q2
The bases of Q1 are connected in common, and the emitters of each are connected to the positive voltage power supply V+ of power supply terminal 1, the collector of Ql is connected to input terminal 2, and the collector of Q2 is connected to output terminal 3. Furthermore, the base of another PNP transistor Q3 is connected to the collector of Q1, and the collector is grounded. Two resistors R1 and R2 are connected in series between the positive voltage power supply ■+ of power supply terminal 1 and the emitter of Q3, and the common connection point of R1 and R2 is between Q1 and Q2.
It is connected to the base common connection point of. This is similar to the conventional three-transistor circuit shown in Figure 2. It can be thought of as a configuration in which a voltage divider circuit consisting of two series resistors for determining the base voltage of Q1 is added to the mirror circuit.

Next, the operation of this embodiment will be explained.

PNP} The emitter current IE3 of the transistor Q3 flows through the resistor R2 to R1 and the bases of Ql and Q2.

Here, the value of IZ3 is Ql, the base current IB1+ of Q2
If it is sufficiently larger than IB2, most of IE3 will flow to R1. Therefore, the collector-emitter voltage VQE1 of the input transistor Q1 is expressed by the following equation.

VCE■=I13Rl + Ig3R2 + Vat
s・Old・・・・・・・・・・・・・・・・・・・・・・・・5 Here, VBE3 is the base-emitter voltage of Q3. Also, the base-emitter voltage VBE of Q1 = I
Since tJ1, Equation 5 becomes as follows.

VCE■=VB! ■(1 + R2/Rl) +
VBε3・・・・・・・・・・・・・・・・・・6 Here, VagxL5Vags# 0. 7 V tear 7
) Note, equation 6 is as follows.

VCE1=0.7 (2 +R2/Rl)...
・・・・・・・・・・・・・・・・・・・・・7
That is, the collector-emitter voltage VCE1 of the input transistor Q1 is determined by the ratio of the values of the resistors R1 and R2.

Therefore, 4 in [Problem to be solved by the invention]
As shown in the formula, in order to eliminate errors in input/output current due to earth voltage, the collector of input side transistor Q1
Since it is sufficient that the emitter voltage VCE t and the collector-emitter voltage VCE2 of the output side transistor Q2 are equal, select the ratio of the values of the resistors R1 and R2 appropriately, and select "/C
This can be achieved by making KI equal to Vet2. Note that the above explanation was given using a circuit using a PNP transistor as an example, but even if an NPN transistor is used,
Of course, the invention can be applied as long as it does not depart from the spirit of the invention. [Effects of the Invention] As explained above, according to the present invention, the voltage between the collector and emitter of the transistor on the input side can be determined accurately only by the ratio of the values of the two resistors. By appropriately selecting the value of , it can be made equal to the collector-emitter voltage of the output side transistor, which has the effect of eliminating input/output current errors due to the earth effect.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a conventional current mirror circuit. 1...Power terminal, 2...Input terminal, 3...Output terminal, Ql. Q2. Q3...PNP transistor, R
l, R2...Resistor

Claims (1)

[Claims] first and second transistors whose bases are commonly connected to each other and whose emitters are different, each connected to one of the power supply terminals, and the other whose base is connected to the collector of the first transistor and whose collectors are different; between a third transistor connected to the power supply terminal of the transistor, and a power supply terminal on the side to which the base common connection point of the first and second transistors and the emitters of the first and second transistors are connected. a second resistor connected between a base common connection point of the first and second transistors and an emitter of the third transistor; A current mirror circuit characterized in that the collector of the first transistor is used as an input terminal, and the collector of the second transistor is used as an output terminal.