JPS62133478A - Active matrix type display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] In a display device in which scan canvas lines, data bus lines, display electrodes, switching elements, etc. are patterned on two glass substrates, and a display medium is held between them, A display device that improves manufacturing yield and drive area ratio by providing scan bus lines and data bus lines on separate glass substrates.

[Industrial application field]

The present invention relates to an active matrix display device having a structure in which path lines for data input and scan lines for line addresses are separately provided on two opposing glass substrates.

The active matrix type display device is a simple matrix. It is used as a terminal of an information processing device together with a RX-type display device, and liquid crystal is used as the display medium.

Comparing the characteristics of the two, the active matrix type can drive a large number of pixels independently, so even if the number of lines increases with the increase in display capacity, the driving duty ratio is lower than that of the simple matrix type. There are no problems such as a decrease in contrast or a decrease in viewing angle.

However, since a switching element is provided for each pixel, the cost tends to be high, and since all switching elements must be of good quality, there is a problem with manufacturing yield.
There is a problem with the size of the panels being sawn from this point.

The present invention relates to a circuit configuration for improving the manufacturing yield of such active matrix display devices.

[Conventional technology]

Figure 2 shows a conventional equivalent circuit for a panel constituting an active matrix display device.
A switching element (thin film transistor, hereinafter abbreviated as TPT) 2 is provided for each, and one end of the switching element 2 is connected to a liquid crystal element 3 constituting the pixel 1 .

That is, scan bus line 4 and data bus line 5
The scan line 4 is connected to the gate electrode 6 of the TNT 2 of each pixel 1, and the data bus line 5 is connected to the drain electrode 7 of each TFT 2. has been done.

TI again? The source electrode 8 of T2 is circuit-connected to the display electrode of the liquid crystal element 3, and the transparent electrodes facing the display electrode are commonly connected and grounded.

The conventional method for driving a panel is to drive the scan canvas lines 4, which are provided in large numbers on the panel, with a pulse width of 30 to
A liquid crystal display is performed by applying a signal pulse from the data bus line 5 and applying a display signal synchronized with the address pulse to each liquid crystal cell while sequentially performing line addressing using short pulses of 60 μSeC.

That is, by turning on TFT 2, liquid crystal element 3
Charging is performed between the display electrode and the transparent electrode, and the resulting potential difference turns the liquid crystal element 3 into an ON state, and T
Even after the FT 2 is turned off, the liquid crystal element 3 continues to be in the ON state because the charged charge is maintained as it is, and refreshment is performed when the next line address is performed again and the TFT 2 is turned on.

Although a liquid crystal display is performed in this way, the scan canvas line 4 and the data bus line 5 are formed on the same glass substrate, and have a structure in which they intersect with each other. Problems include a high probability of line breakage, a high probability of short circuits or poor insulation between the lines, and an inability to maintain a high drive area ratio, which represents the ratio of the display electrode area to the pixel area.

[Problem that the invention seeks to solve]

As described above, since the scan canvas lines and data bus lines, which are formed in a matrix in a display device, are formed on the same glass substrate, there is a high probability that one of the pass lines will be disconnected. Another problem is that poor insulation is likely to occur at the crossing position, and furthermore, since two types of pass lines are patterned, the driving area ratio cannot be increased.

[Means for solving problems]

The above problem is that the first glass substrate has a scan canvas line, a switching element connected to the display electrode of the pixel, and a ground path line, and the second glass substrate has a data bus line made of a striped transparent conductive film. This problem can be solved by an active matrix display device characterized by having a structure in which the display medium is sandwiched between the two.

[Effect]

In the present invention, scan canvas lines 4 and data bus lines 5 are patterned on separate substrates by changing the arrangement of TFTs 2 and liquid crystal elements 3 constituting pixels.

That is, as shown in FIG. 1 and a perspective view of the equivalent circuit and FIG. A common ground 9 connected to the source electrode 8 of the TPT 2 is formed as a ground pass line 11.

Further, a stripe-shaped transparent electrode 12 is patterned on the opposing second glass substrate, and a circuit is connected to the data bus line 5.

In this way, the scan canvas line 4 and the data bus line 5 are formed on separate glass substrates, which eliminates defects such as poor insulation and short circuits, and improves the driving area ratio. The manufacturing yield can be improved by inspecting the path lines for disconnection and combining only the substrates with no disconnections.

On the other hand, in the panel according to the present invention, the ground path line 1
1, and in this case, the ground path line 11 and the scan canvas line 4 may intersect depending on the case.

FIG. 4 schematically shows the ground path line 11 in such a case, and has a configuration in which it is taken out from the common terminal 13.

Here, the ground path line 11 is a TPT that forms each pixel 1.
However, compared to the number of intersections between the scan canvas line 4 and the data bus line 5 in the conventional structure, the number of intersections is extremely small, and the number of intersections is very small compared to the number of intersections between the scan canvas line 4 and the data bus line 5 in the conventional structure. Even if a defect occurs, it can be repaired by cutting the ground path line 11 at that location before and after the defective location and isolating it.

Further, in order to form the ground pass line 11 and the scan canvas line 4 without crossing each other, it is sufficient to form them in a meandering shape, bypassing the scan canvas line 4, as shown in FIG.

Furthermore, if a semiconductor substrate such as a silicon wafer is used as a substrate for forming a switching element, the substrate itself can be used as a grounding electrode, so there is no need to provide the grounding pass line 11.

Next, FIG. 7 is a waveform diagram of the drive circuit according to the present invention,
This corresponds to the equivalent circuit shown in FIG.

That is, the potential of the ground path line 11 connecting the common ground 9 is kept at 0■, while the data voltage Vda of +Va and -Va is applied to the data path line 5 at the address timing.
ta is applied with alternating polarity.

Further, the scan canvas line is maintained at a negative voltage of Vg- during non-addressing so that it remains OFF even during negative data, and Vg+ is applied during addressing.

Here, the voltage V pad indicates the voltage applied to the display electrode 10, and at the time of address, charging and discharging is performed through the TFT 2 in the ON state and returns to Ov, but the potential of the scan canvas line 4 becomes Vg- and the TPT 2 After turning off, the potential of the data bus line 5 changes from +Va to O, and at the same time, Vpad, which is coupled to the data bus line 5 through the capacitance of the liquid crystal element 3, changes from Ov to -Va. , is maintained as it is until the next address, and changes to +Va at the next address.

On the other hand, VLc is the voltage applied to the liquid crystal element 3, and Vda
ta is the value of -Vpad, and the liquid crystal display is performed by changing to +Va and -Va as shown in (E) of the figure.

〔Example〕

The difference from the conventional structure of the present invention is that the data bus line 5 is provided on the second glass substrate together with the transparent electrode 12, as shown in FIGS. 3 and 4, and the scan bus line 4. The point is that a ground pass line 11 is newly provided on the first glass substrate on which the TPT 2 and the display electrode 10 are provided.

Therefore, most of the processes are the same as before.

However, a new intersection between the scan canvas line 4 and the ground path line may occur.

The following is an example of an insulation method at the crossover position and measures to be taken in the event of insulation failure or short circuit.

The size of the pixel 1 shown in FIG. 4 is 200 .mu.m square, and a ground path line 11 with a width of 20 .mu.m is run between the pixels and taken out from the common terminal 12.

Here, it intersects with the scan canvas line 4 at multiple locations (six locations in this figure).

This insulation is performed simultaneously with the formation of the TFT 2 formed on the first glass substrate.

FIG. 8 is a sectional view showing a method of forming the ground path line 11 that intersects the scan canvas line 4.

That is, on the scan canvas line 4 made of chromium (Cr), a silicon nitride (Si3Nm) layer 14 is formed to a thickness of about 3000 nm by chemical vapor deposition (CVD) for insulation, and on top of this, a layer 14 of silicon nitride (Si3Nm) is formed in the same manner. After forming an amorphous silicon (a-5i for short) layer 15 to a thickness of approximately 1,000 layers by CVD, an n''a-5i layer 16 and an 11 layer 17 are formed as conductor layers, and these are formed by photolithography. The ground pass line 11 is patterned by patterning.

Next, Figure 6 shows scan canvas line 4 and ground pass line 1.
This shows a countermeasure in case a short circuit or insulation failure occurs at the intersection with 1. The ground path line 11 before and after the defective point can be cut by a method such as laser cutting as shown by the broken line.

In this way, the ground path line is provided in a ladder shape, so there is no possibility of line defects, and
It also does not affect the properties of T2.

〔Effect of the invention〕

The present invention solves the problem that in the conventional panel configuration, the scan canvas line 4 and the data bus line 5 are provided in an intersecting manner on the same substrate, so that the defect rate is multiplied and the manufacturing yield is reduced. However, this problem can be solved by implementing the present invention, and even if an insulation failure occurs between the scan canvas line and the ground path line, it can be easily recovered.

As described above, by carrying out the present invention, manufacturing yield can be significantly improved and costs can be reduced.

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit of a panel according to the present invention, FIG. 2 is an equivalent circuit of a conventional panel, FIG. 3 is a perspective view of a panel to which the present invention is applied, and FIG. 4 is a ground path line according to the present invention. FIG. 5 is a plan view showing another ground pass line according to the present invention; FIG. 6 is a plan view illustrating separation of a defective part of the ground pass line; FIGS. 7 (A) to (E) are FIG. 8 is a waveform diagram of the drive circuit according to the present invention. FIG. 8 is a sectional view showing a method of forming a ground path line that intersects with the scan canvas line. In the figure, l is a pixel, 2 is a TPT, 3 is a liquid crystal element, 4 is a scan canvas line, 5 is a data bus line, 6 is a gate electrode, 7 is a drain electrode, 8 is a source electrode, 9 is a common ground, and lO is a display electrode,
11 is a ground pass line, and 12 is a transparent electrode.

Claims (1)

[Claims] Pixel switching elements and display electrodes are patterned in a rectangular area defined by a plurality of scan canvas lines and data bus lines intersecting at right angles, and a display medium is sandwiched between the opposing transparent electrodes. In a display device having a structure in which a switching element is connected to a scan canvas line and a display electrode of a pixel on a first glass substrate,
1. An active matrix display device characterized by having a structure in which a display medium is sandwiched between a second glass substrate having a data bus line made of a striped transparent conductive film.