JPH02221936A - Active matrix display device - Google Patents

Abstract

PURPOSE:To suppress the influence of external static electricity and to easily inspect a disconnection defect and characteristics without requiring a short ring wire by making the line width of the intersection part between a bus line for supplying a liquid crystal driving signal and spare wiring larger than that of a nonintersection part. CONSTITUTION:In the outside area of a part where a source bus line X, a gate bus line Y, a bus line Z for a storage capacitor, a TFT 22, the storage capacitor, and a picture element electrode are formed, the spare wiring 21 is formed in two-level crossing relation across the end part of the each bus line and an insulating layer. Then capacitors are formed with wide line width like La and W at intersection parts of the bus lines. Consequently, the influence of external static electricity can be suppressed through the operation of the floating capacity of each bus line without forming any short ring line for an electrostatic countermeasure. Further, the line 21 is not short-circuited to each bus line, so the disconnection defect D and the characteristics of the TFT 22 can be inspected as it is.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an active matrix display device, and more particularly to a display electrode substrate of an active matrix display device.

Conventional Technology In addition to forming switching elements such as thin film transistors (hereinafter abbreviated as TPT) arranged in a matrix on a light-transmitting insulating substrate such as a glass plate, signal lines, scanning lines, In the case of an active matrix drive type liquid crystal display device that uses a display electrode substrate that also has wiring such as storage capacitor wiring, the response speed of the liquid crystal is fast, and a light-transmitting insulating substrate used as the display electrode substrate is used. It has been widely put into practical use in recent years because it has the advantage of having no area restrictions and can be applied to both reflective and transmissive types.

Conventionally, in the manufacturing process of such display electrode substrates, short-circuiting was carried out to prevent dielectric breakdown on the display electrode substrate or change in the characteristics of the switching elements due to external static electricity during the process. The ring line was formed outside the area where wiring, switching elements, and the like were formed on the display electrode substrate.

FIG. 5 is a plan view showing an example of the surface H of the display electrode substrate during the manufacturing process in which such a short ring line 1 is formed. In Figure 5, source bus line
,X2. ..., Xm-1.

Xm (hereinafter, any source bus line is represented by the symbol X)
is a bus line serving as a signal line, and gate bus line Y
IY2. Y3.・-・, Yn-1, Yn (hereinafter,
Arbitrary gate bus lines (represented by symbol Y) are bus lines serving as scanning lines, and these are arranged and formed on an insulating substrate so as to intersect each other at right angles with an insulating layer interposed therebetween.

TPT2 is a switching element of the display electrode substrate,
This TPT 2, storage capacitor 3, and picture element electrode (not shown) are
They are arranged in a matrix in each square surrounded by the source bus line or the gate bus line Y, and the source electrode of the TFT 2 is connected to the source bus line X, the gate electrode is connected to the gate bus line Y, The drain electrodes are connected to one end of the storage capacitor 3 and the picture element electrode, respectively.

In addition, storage capacitor bus lines Zl, Z2 . ...Zn-1,Z
n (hereinafter, an arbitrary storage capacitor bus line is represented by the symbol Z) are arranged parallel to the gate bus line Y and intersect with the source bus line X at right angles via an insulating layer. There is. The source bus line X, gate bus line Y, storage capacitor bus line Z, TPT2, storage capacitor M3. Each bus line X,
A short ring wire 1 is formed to short-circuit the Y and Z ends.

When connecting the drive circuit to this display electrode substrate, the short ring line 1 is cut between the source bus lines X, gate bus lines Y, and storage capacitor bus lines Z that are short-circuited by the short ring line 1. separated by

FIG. 6 is an enlarged sectional view showing a part of the specific structure of an active matrix liquid crystal display device incorporating the display electrode substrate. In FIG. 6, an insulating substrate 4 is made of a glass plate, and a thin Ta (tantalum) film of 2,500 yen is formed on the insulating substrate 4 as the gate electrode 5 of the TPT 2, and a thin film of tantalum of 2,500 yen is further formed on the insulating substrate 4 as a gate electrode 5 of the TPT 2. 3000 Ta20s (
A tantalum oxide (tantalum oxide) film 6a and a 5iNx (silicon nitride) film 6b having a thickness of 3,000 wafers are formed as the gate insulating film 6. Further, on the gate insulating film 6, a-
A 3i(i) (intrinsic semiconductor amorphous silicon) layer 7 and an a-3i(n”) (n-type semiconductor amorphous silicon) layer 8 with a film thickness of 500 are formed, and further a source electrode 9 and a A Ti (titanium) film with a thickness of 2000 nm is selectively formed to become the drain electrode 10.
-3i-TFT2 is configured.

The picture element electrode 11 is made of an ITO (indium tin oxide) film with a thickness of 1000, and a part of it is laminated on the drain electrode 10. The gate bus line Y, which is a scanning line, and the storage capacitor (not shown in FIG. 6) are connected by a Ta film.
Further, the source bus lines X, which are signal lines, are each formed of TiWA. Furthermore, an SiNx film having a thickness of 3000 is formed as a protective film 12 on the entire surface thereof, and an alignment film 13a is formed on the entire upper surface thereof.

A counter substrate 15 is disposed to face the display electrode substrate 14 configured in this way, and a liquid crystal layer 16 is interposed between the display electrode substrate 14 and the counter substrate 15.

In the counter substrate 15, of the surface of the insulating substrate 17 made of a glass plate that faces the display electrode substrate 14, a color filter 18 is provided on a portion facing the picture element electrode 11, and a color filter 18 is provided on the other portion that does not transmit light. A film 19 is formed, and an opposing type v&20 is formed of an ITO film on the entire surface thereof, and an alignment film 13b thereof is further formed.

Problem to be Solved by the Invention However, in the case of the display electrode substrate 14 described above, each bus line X, Y, Z is
Since the wires are short-circuited by the short ring wire 1, it becomes extremely difficult to inspect for wire breaks and other defects during this time.

Further, when connecting this display electrode substrate 14 to a drive circuit, the short ring line 1 is cut and each source bus line
, the gate bus line Y, and the storage/accumulation capacity bus line 2 must be separated from each other, which not only takes time but also when disconnecting them or connecting the drive circuit after disconnecting them. Due to the static electricity generated on the bus line
, Y, and Z, and characteristic changes occur in the TPT2, causing problems such as line defects and pixel defects on the display screen.

Among the problems mentioned above, the effects of static electricity generated when the short ring wire l is cut or when the drive circuit is connected are as follows:
As shown in FIG. 7, which schematically shows a part of the surface structure of the display electrode substrate 14 on an enlarged scale, parasitic stray capacitances CI, C2, C3 and the source bus line X are parasitic between the source bus line X and the gate bus line Y. - It can be suppressed to some extent by the parasitic stray capacitance C4 between the storage capacitance paths 942. because,
The amount of charge due to external static electricity is Q, each bus line X,
If the parasitic stray capacitance between Y and Z is C, then the voltage ■ applied between the bus lines X, Y, and Z is expressed as V = Q/C...<1) This is because, if the stray capacitance C is large to some extent, the applied voltage (2) due to static electricity becomes small.

However, the stray capacitance C1 shown in FIG.
The capacitance of the part A where the source bus line Bus line Z
The capacity of the part B where
, Y, and Z, the intersection is represented by the product wx-wy, wx, wz of the line widths of each bus line x, y, and z, each formed with a uniform line width. These stray capacitances CI, C4 are area dependent and therefore do not become very large.

In particular, in the case of display electrode substrates used in high-definition or small active matrix display devices, bus lines x, y
, z becomes thinner, the stray capacitances C1 and C4 become relatively small, and the influence of static electricity cannot be suppressed.Furthermore, the stray capacitances C2 and C3 shown in FIG. 7 are TPT.
2, the capacitances of the portion where the gate electrode 5 and the source electrode 9 overlap and the portion where the gate electrode 5 and the drain electrode 10 overlap with the gate insulating film 6 in FIG. C2,
C3 is also a small value that is insufficient to suppress the influence of static electricity.

Therefore, an object of the present invention is to be able to suppress the influence of static electricity from the outside without forming a short ring wire, and to easily perform characteristics inspection of switching elements and disconnection defect inspection even during the manufacturing process. An object of the present invention is to provide an active matrix display device including an electrode substrate.

Means for Solving the Problems The present invention provides a bus line for supplying a voltage signal for driving a liquid crystal on an insulating substrate, and a spare wiring for disconnection correction connectable to any of these bus lines, which intersects with the bus line at a three-dimensional intersection. In an active matrix display device equipped with an electrode substrate formed in this way, the line width at the intersection of each bus line and the preliminary wiring is wider than the line width at the non-intersection, and the stray capacitance generated at the intersection is reduced. This is an active matrix display device characterized by having a large value.

According to the present invention, a large stray capacitance is generated at the intersection of the preliminary wiring and each bus line, so that the influence of static electricity applied from the outside to the display electrode substrate is suppressed by this stray capacitance. In addition, since there is no need to form short ring wires for static electricity countermeasures, there is no need to cut the short ring wires, and each bus line is always separated, so during the manufacturing process of the electrode substrate, It is also possible to easily inspect disconnection defects and characteristics of switching elements.

Embodiment FIG. 3 is a plan view schematically showing the surface structure of a display electrode substrate included in an active matrix display device according to an embodiment of the present invention. In FIG. 3, source bus lines XI, X2 . . . . X'm -1, Xm (hereinafter, an arbitrary source bus line is represented by the symbol X) are bus lines serving as signal lines, and gate bus lines Yl, Y2 . Y
3. River, Yr, ...Yn---1, Yn (hereinafter, arbitrary gate bus lines are represented by the symbol Y) are bus lines that become scanning lines, and these are connected to each other on an insulating substrate with an insulating layer interposed between them. They are arranged in such a way that they intersect at right angles. Apart from this, there is also a storage capacitor bus line Z1. Z2. -, Zn-1, Zn (hereinafter, an arbitrary storage capacitor bus line is represented by the symbol 2) are parallel to the gate bus line Y and intersect with the source bus line X at right angles through an insulating layer. formed in an array.

The TPT 22 is a switching element of the display electrode substrate, and the TFT 22, the storage capacitor 23, and a picture element electrode (not shown) are arranged in a matrix in each square surrounded by the source bus line X and the gate bus line Y. The source electrode of the TPT 22 is connected to the source bus line X, the gate electrode is connected to the gate bus line Y, and the drain electrode is connected to one end of the storage capacitor 23 and the picture element @ pole.

In addition, the source bus line X, the gate bus line Y,
In the area outside the area where the storage capacitor bus line Z, TFT 22, storage capacitor 23, and picture element electrode are formed, a preliminary wiring 21 is formed so as to cross three-dimensionally with the ends of each bus line X, Y, and Z via an insulating layer. has been done.

FIG. 1 is an enlarged plan view showing a portion a where the source bus line X and the spare wiring 21 intersect with each other, and FIG.
21 is an enlarged plan view illustrating a portion (c) where 21 intersect with each other. In FIG. 1, at the intersection a of the preliminary wiring 21 with each source bus line X, the line width Wa is equal to the length L.
The source bus line It is formed to have a wide line width La. That is, at the intersection a of the preliminary wiring &121 and the source bus line X, a capacitor with an electrode area of Wa-La is formed.

In addition, in FIG. 2, regarding the intersections of the preliminary wiring 21 with the respective gate bus lines Y and N product capacitance bus lines Z, the line widths Wb and Wc extend over the lengths Lb and Lc of the remaining wiring. The gate bus line Y, N product capacitance bus line Z is formed sufficiently wider than the line width W1 of the
, the line width at their intersection S,c is the length Wb,
They are formed so that Lb and Lc are sufficiently wider than the line width W2 of the remaining wiring portion over Wc. That is, at the intersections between the preliminary wiring 21, the gate bus line Y, and the storage capacitor bus line Z, the electrode area Wb, Lb, or W
This means that capacitors c and Lc are formed.

FIG. 4 is an enlarged sectional view showing a part of the specific structure of an active matrix liquid crystal display device incorporating the display electrode substrate. In FIG. 4, the insulating substrate 24 is made of a glass plate, and the gate electrode 25 of the TPT 22 is made of Ta (tantalum) with a thickness of 2500 nm on the insulating substrate 24.
A film is formed, and a film T a of 3000 people is formed on top of it.
t Os (tantalum oxide) film 26a and film thickness 3000
A 5iNx (silicon nitride) film 26b is formed as the gate insulating layer 26.

Further, on the gate insulating film 26, a-St with a film thickness of 1000
(i) A layer 27 (intrinsic semiconductor amorphous silicon) and a layer 28 (n-type semiconductor amorphous silicon) 28 having a thickness of 500 mm are formed, and a source electrode 29 and a drain electrode 28 are formed thereon. 52,000 Ti (titanium) films are selectively formed to form the electrodes 30, thereby forming the a-8i-TPT 22. Picture element electrode 3
1 is ITO (indium #! oxide) with a film thickness of 1000 people
A portion of the film is laminated on the drain electrode 530.

Gate bus line Y, which is a scanning line, and storage capacitor i (fourth
(not shown in the figure) are formed of TaWA, and the source bus line X, which is a signal line, is formed of a Ti film. Furthermore, the entire surface above it has a film thickness of 3000 people.
An iNx film is formed as a protective film 32, and an alignment film 33a is formed on the entire upper surface thereof.

A counter substrate 35 is disposed to face the display electrode substrate 34 configured in this manner, and a liquid crystal layer 36 is interposed between the display electrode substrate 34 and the counter substrate 35.

In the counter substrate 35, a color filter 38 is provided on a portion of the surface facing the display substrate 34 of an insulating substrate 37 made of a glass plate that faces the picture element electrode 31, and a light non-transmissive film is provided on the other portion. A counter electrode 40 is formed of ITOII on the entire surface thereof, and an alignment film 33b thereof is further formed.

Further, on the preliminary wiring 21 formed on the display electrode substrate 34, a source bus line line Y, storage capacitor bus line Z (fourth
(not shown in the figure) on top of the insulating film (not shown in Fig. 4)
The preliminary wiring 21 is arranged in a three-dimensional intersection. The portions of the preliminary wiring 21 that do not intersect with the bus lines X, Y, and Z and the intersecting portion a with the source bus line , c are formed of Ti films. The source bus line X is made of a Ti film, and the gate bus line Y and the storage capacitor bus line 2 are made of a Ta film.

Before the display electrode substrate is combined with a liquid crystal to form an active matrix liquid crystal display device, each bus line x,
The presence or absence of disconnection defects in y and z is inspected, and the disconnection locations are corrected by the preliminary wiring 21.

That is, in FIG. 3, for example, the gate bus line Y
If a disconnection point is found in the middle of r, the intersections bl and b2 with the preliminary wiring 21 at both left and right ends are connected to the preliminary wiring 21, and the gate voltage is applied from the end side shown by the arrow in FIG. If applied, the gate voltage will be the same as the preliminary wiring 21
It has been modified so that it can also be supplied from the point of disconnection via .

In addition, since the bus lines x, y, and z are not short-circuited, in addition to inspecting the disconnection defects mentioned above, the characteristics of the TPT22 can also be inspected by three-terminal measurements without making any changes to the display electrode substrate. It can be done as is.

Furthermore, even if static electricity is applied to the display electrode substrate from the outside before it is assembled into an active matrix liquid crystal display device, the intersections a, b, and c of the preliminary wiring 21 and each bus line x, y, and z may be damaged. Since the parasitic stray capacitance is large, this stray capacitance reliably suppresses the influence of static electricity on the display electrode substrate.

Effects of the Invention As described above, according to the active matrix display device of the present invention, the stray capacitance generated at the intersection of the spare wiring and each bus line is large, and therefore, it is possible to eliminate the need to form a short ring line for static electricity countermeasures. The effect of static electricity from the outside can be suppressed by the action of the stray capacitance mentioned above, and since short ring wires are not used, there is no need to cut them, and it is also easy to conduct disconnection tests and characteristics tests of switching elements. can.

[Brief explanation of the drawing]

1 and 2 are respectively enlarged plan views showing the main parts of the surface structure of a display electrode substrate used in an active matrix display device which is an embodiment of the present invention, and FIG. FIG. 4 is a plan view showing a schematic configuration of the surface structure, FIG. 4 is a cross-sectional view showing an enlarged part of a liquid crystal display device assembled using the display electrode substrate, and FIG. 5 is a conventional active matrix display device. FIG. 6 is a plan view showing a schematic structure of the surface structure of the display electrode substrate; FIG. 6 is an enlarged cross-sectional view of a part of a liquid crystal display device assembled using the display electrode substrate; FIG. 8 is a partially enlarged plan view of a surface structure showing parasitic stray capacitance added to the display electrode substrate, and FIG. 8 is a plan view showing an enlarged bus line intersection of the display electrode substrate. 21... Preliminary wiring, 22... TFT, 23... Storage capacitor, x1-Xm... Source bus line, Y1-Y
n...Gate bus line, z1~Zn...Bus line for storage capacity, a, b, c...Intersection agent Patent attorney Number of strokes Keiichi part diagram diagram diagram diagram

Claims (1)

[Scope of Claims] A bus line for supplying a voltage signal for driving a liquid crystal on an insulating substrate, and an electrode formed by three-dimensionally intersecting with the bus line a spare wiring for repairing disconnection that can be connected to any of these bus lines. In an active matrix display device including a substrate, the line width at the intersection of each of the bus lines and the preliminary wiring is wider than the line width at the non-intersection, and the stray capacitance generated at the intersection is set to be large. An active matrix display device characterized by: