JPS62129653U - - Google Patents
Info
- Publication number
- JPS62129653U JPS62129653U JP1757786U JP1757786U JPS62129653U JP S62129653 U JPS62129653 U JP S62129653U JP 1757786 U JP1757786 U JP 1757786U JP 1757786 U JP1757786 U JP 1757786U JP S62129653 U JPS62129653 U JP S62129653U
- Authority
- JP
- Japan
- Prior art keywords
- input
- port
- output
- microcomputer
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
- 239000013256 coordination polymer Substances 0.000 description 1
Landscapes
- Microcomputers (AREA)
Description
第1図は本考案の一実施例のブロツク図。第2
図はマイクロコンピユータの内部構成を示すブロ
ツク図。第3図は本考案の一実施例の作用の説明
に供するフローチヤート。第4図は従来例のブロ
ツク図。
CP……マイクロコンピユータ、R0〜R3…
…プルダウン抵抗、D0およびD1……ダイオー
ド、P0〜P3……入出力ポート。
FIG. 1 is a block diagram of one embodiment of the present invention. Second
The figure is a block diagram showing the internal configuration of a microcomputer. FIG. 3 is a flowchart for explaining the operation of one embodiment of the present invention. FIG. 4 is a block diagram of a conventional example. CP...Microcomputer, R0 to R3 ...
...Pull-down resistor, D0 and D1 ...diode, P0 to P3 ...input/output port.
Claims (1)
イクロコンピユータにおいて、入出力兼用ポート
にプルアツプ抵抗またはプルダウン抵抗をそれぞ
れ接続し、入出力兼用ポート中入力ポートとして
使用するポートにはダイオードを介して入力デー
タを導くと共に、入出力兼用ポートを出力モード
に設定したときダイオードをオフ状態にするデー
タを入力ポートとして使用するポートに出力する
ことを特徴とするマイクロコンピユータのポート
入出力回路。 In a microcomputer that has input/output ports in units of multiple bits, a pull-up resistor or pull-down resistor is connected to each input/output port, and input data is guided through a diode to the port used as an input port among the input/output ports. A port input/output circuit for a microcomputer is further characterized in that when the input/output port is set to output mode, data that turns off a diode is output to a port used as an input port.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1757786U JPH04419Y2 (en) | 1986-02-12 | 1986-02-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1757786U JPH04419Y2 (en) | 1986-02-12 | 1986-02-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62129653U true JPS62129653U (en) | 1987-08-17 |
JPH04419Y2 JPH04419Y2 (en) | 1992-01-08 |
Family
ID=30810459
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1757786U Expired JPH04419Y2 (en) | 1986-02-12 | 1986-02-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04419Y2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6473411A (en) * | 1987-09-14 | 1989-03-17 | Nec Corp | Bus driving system |
JPH0161751U (en) * | 1987-10-13 | 1989-04-19 |
-
1986
- 1986-02-12 JP JP1757786U patent/JPH04419Y2/ja not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6473411A (en) * | 1987-09-14 | 1989-03-17 | Nec Corp | Bus driving system |
JPH0161751U (en) * | 1987-10-13 | 1989-04-19 |
Also Published As
Publication number | Publication date |
---|---|
JPH04419Y2 (en) | 1992-01-08 |
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