JPS5885229U - key matrix circuit - Google Patents
key matrix circuitInfo
- Publication number
- JPS5885229U JPS5885229U JP17687381U JP17687381U JPS5885229U JP S5885229 U JPS5885229 U JP S5885229U JP 17687381 U JP17687381 U JP 17687381U JP 17687381 U JP17687381 U JP 17687381U JP S5885229 U JPS5885229 U JP S5885229U
- Authority
- JP
- Japan
- Prior art keywords
- signal lines
- input
- matrix circuit
- key matrix
- signal line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Input From Keyboards Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図および第2図はそれぞれ従来のキーマトリクス回
路の一例を示す回路図、第3図は本考案の一実施例の回
路図である。
1・・・マイコン、SL1〜SL3・・・スキャン信号
線、T1〜T3・・・出力ポート、KR1〜KR4・・
・入力ポート、ILl〜IL4・・・入力信号線。1 and 2 are circuit diagrams showing an example of a conventional key matrix circuit, respectively, and FIG. 3 is a circuit diagram of an embodiment of the present invention. 1...Microcomputer, SL1-SL3...Scan signal line, T1-T3...Output port, KR1-KR4...
- Input ports, ILl to IL4...input signal lines.
Claims (1)
複数の入力信号線と、両信号線の各文さ点の少なくとも
一部に、前記スキャン信号線と入力信号線とを接続する
ように配置された複数のスイッチと、前記各入力信号線
とグランド間にそれぞれ接続されたプルダウン抵抗とを
具備したキーマトリクス回路において、前記入力信号線
のうち少なくとも1つの特定信号線およびこれに対応す
る入力ポートとの間に直列接続された抵抗と、前記特定
信号線の入力ポートおよび前記スキャン信号線の1つと
の間に接続された整流素子とを具備したことを特徴とす
るキーマトリクス回路。A plurality of scan signal lines and a plurality of input signal lines arranged in a matrix, and a plurality of scan signal lines and a plurality of input signal lines arranged so as to connect the scan signal line and the input signal line to at least a part of each line point of both signal lines. A key matrix circuit comprising a plurality of switches and a pull-down resistor connected between each of the input signal lines and ground, wherein at least one specific signal line among the input signal lines and a corresponding input port are connected to each other. A key matrix circuit comprising: a resistor connected in series between the input ports of the specific signal line and a rectifying element connected between the input port of the specific signal line and one of the scan signal lines.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17687381U JPS5885229U (en) | 1981-11-30 | 1981-11-30 | key matrix circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17687381U JPS5885229U (en) | 1981-11-30 | 1981-11-30 | key matrix circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5885229U true JPS5885229U (en) | 1983-06-09 |
Family
ID=29970232
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17687381U Pending JPS5885229U (en) | 1981-11-30 | 1981-11-30 | key matrix circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5885229U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01178634U (en) * | 1988-06-09 | 1989-12-21 | ||
JP2012112576A (en) * | 2010-11-24 | 2012-06-14 | Harman Co Ltd | Operation detection circuit for operation switch, and heating cooker using the same |
-
1981
- 1981-11-30 JP JP17687381U patent/JPS5885229U/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01178634U (en) * | 1988-06-09 | 1989-12-21 | ||
JP2012112576A (en) * | 2010-11-24 | 2012-06-14 | Harman Co Ltd | Operation detection circuit for operation switch, and heating cooker using the same |
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