JPS62124862U - - Google Patents

Info

Publication number
JPS62124862U
JPS62124862U JP1025686U JP1025686U JPS62124862U JP S62124862 U JPS62124862 U JP S62124862U JP 1025686 U JP1025686 U JP 1025686U JP 1025686 U JP1025686 U JP 1025686U JP S62124862 U JPS62124862 U JP S62124862U
Authority
JP
Japan
Prior art keywords
power supply
buried gate
static induction
supply portion
lattice
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1025686U
Other languages
Japanese (ja)
Other versions
JP2517172Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986010256U priority Critical patent/JP2517172Y2/en
Publication of JPS62124862U publication Critical patent/JPS62124862U/ja
Application granted granted Critical
Publication of JP2517172Y2 publication Critical patent/JP2517172Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Thyristors (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図aは本考案による静電誘導型トランジス
タをそのソース層を除いてゲート部を示した平面
図、第1図bは、第1図aのX―Y線部分をソー
ス層も含めて示した縦断面図、第2図は従来の静
電誘導型トランジスタのゲート部の平面図。 4……ゲート電極、5……ドレインオーミツク
層、6……ドレインN層、7……ソースN
層、8,8′,9,9′……給電点、12……埋
め込みゲート層。
Figure 1a is a plan view of the electrostatic induction transistor according to the present invention, showing the gate portion excluding the source layer, and Figure 1b is a plan view of the XY line section of Figure 1a including the source layer. FIG. 2 is a plan view of a gate portion of a conventional static induction transistor. 4...Gate electrode, 5...Drain Ohmic N + layer, 6...Drain N- layer, 7...Source N
Layers 8, 8', 9, 9'... Feeding point, 12... Buried gate layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 埋め込みゲートの両端にそれぞれ、金属膜によ
る給電部を形成して成る埋め込みゲート型の静電
誘導型トランジスタにおいて、前記埋め込みゲー
トの平面形状が格子状であり、しかも前記給電部
から離れて2つの給電部間の中間領域になるにし
たがつて格子の間隔がせまくなるようにしたこと
を特徴とする静電誘導型トランジスタ。
In a buried gate static induction type transistor in which a power supply portion made of a metal film is formed at each end of a buried gate, the planar shape of the buried gate is a lattice shape, and two power supply portions are formed apart from the power supply portion. A static induction transistor characterized in that the distance between the lattice becomes narrower toward the intermediate region between the parts.
JP1986010256U 1986-01-29 1986-01-29 Static induction transistor Expired - Lifetime JP2517172Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986010256U JP2517172Y2 (en) 1986-01-29 1986-01-29 Static induction transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986010256U JP2517172Y2 (en) 1986-01-29 1986-01-29 Static induction transistor

Publications (2)

Publication Number Publication Date
JPS62124862U true JPS62124862U (en) 1987-08-08
JP2517172Y2 JP2517172Y2 (en) 1996-11-13

Family

ID=30796382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986010256U Expired - Lifetime JP2517172Y2 (en) 1986-01-29 1986-01-29 Static induction transistor

Country Status (1)

Country Link
JP (1) JP2517172Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4996878U (en) * 1972-12-15 1974-08-21
JPS5028279A (en) * 1973-07-11 1975-03-22

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4996878U (en) * 1972-12-15 1974-08-21
JPS5028279A (en) * 1973-07-11 1975-03-22

Also Published As

Publication number Publication date
JP2517172Y2 (en) 1996-11-13

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