JPS62120376U - - Google Patents
Info
- Publication number
- JPS62120376U JPS62120376U JP801586U JP801586U JPS62120376U JP S62120376 U JPS62120376 U JP S62120376U JP 801586 U JP801586 U JP 801586U JP 801586 U JP801586 U JP 801586U JP S62120376 U JPS62120376 U JP S62120376U
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- circuit device
- boards
- connector
- joined
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive effect Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Combinations Of Printed Boards (AREA)
Description
第1図は本考案に係る電子回路装置の部分断面
図、第2図a,bは同じくその実装工程を示す図
、第3図は従来の電子回路装置の部分断面図、第
4図は別の従来例における電子回路装置の部分断
面図、第5図a〜cは第4図に示した従来の電子
回路装置の回路部品実装工程を示す図である。
1,1A,1B……回路基板、2……導体パタ
ーン、3……回路部品、4……半田、6,7……
結合具。
Fig. 1 is a partial sectional view of an electronic circuit device according to the present invention, Fig. 2 a and b are views showing the mounting process, Fig. 3 is a partial sectional view of a conventional electronic circuit device, and Fig. 4 is a separate view. FIGS. 5a to 5c are partial cross-sectional views of the conventional electronic circuit device shown in FIG. 1, 1A, 1B...Circuit board, 2...Conductor pattern, 3...Circuit components, 4...Solder, 6,7...
Connector.
Claims (1)
も2枚の回路基板を備え、前記2枚の回路基板は
他面側を互いに重ね合せて接合されていることを
特徴とする電子回路装置。 (2) 前記2枚の回路基板は、両基板を重ね合せ
方向から挟持する結合具により接合されているこ
とを特徴とする実用新案登録請求の範囲第1項に
記載の電子回路装置。 (3) 前記結合具は、端子でなることを特徴とす
る実用新案登録請求の範囲第2項に記載の電子回
路装置。 (4) 前記結合具は、ハトメでなることを特徴と
する実用新案登録請求の範囲第2項に記載の電子
回路装置。 (5) 前記2枚の回路基板は、前記他面側が接着
剤により接合されていることを特徴とする実用新
案登録請求の範囲第1項に記載の電子回路装置。[Claims for Utility Model Registration] (1) At least two circuit boards with circuit components mounted only on one side, and the two circuit boards are joined with their other sides overlapping each other. Characteristic electronic circuit device. (2) The electronic circuit device according to claim 1, wherein the two circuit boards are joined by a connector that clamps both boards from the stacking direction. (3) The electronic circuit device according to claim 2, wherein the connector is a terminal. (4) The electronic circuit device according to claim 2, wherein the connector is an eyelet. (5) The electronic circuit device according to claim 1, wherein the other surfaces of the two circuit boards are bonded together with an adhesive.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP801586U JPS62120376U (en) | 1986-01-22 | 1986-01-22 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP801586U JPS62120376U (en) | 1986-01-22 | 1986-01-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62120376U true JPS62120376U (en) | 1987-07-30 |
Family
ID=30792008
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP801586U Pending JPS62120376U (en) | 1986-01-22 | 1986-01-22 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62120376U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006073840A (en) * | 2004-09-03 | 2006-03-16 | Nec Corp | Flexible wiring substrate and folding electronic equipment |
JP2010186848A (en) * | 2009-02-12 | 2010-08-26 | Fujitsu Ltd | Method of manufacturing electronic component unit |
-
1986
- 1986-01-22 JP JP801586U patent/JPS62120376U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006073840A (en) * | 2004-09-03 | 2006-03-16 | Nec Corp | Flexible wiring substrate and folding electronic equipment |
JP4552565B2 (en) * | 2004-09-03 | 2010-09-29 | 日本電気株式会社 | Flexible wiring board and folding electronic device |
JP2010186848A (en) * | 2009-02-12 | 2010-08-26 | Fujitsu Ltd | Method of manufacturing electronic component unit |
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