JPS62119677U - - Google Patents
Info
- Publication number
- JPS62119677U JPS62119677U JP743486U JP743486U JPS62119677U JP S62119677 U JPS62119677 U JP S62119677U JP 743486 U JP743486 U JP 743486U JP 743486 U JP743486 U JP 743486U JP S62119677 U JPS62119677 U JP S62119677U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor device
- hole
- wiring
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 6
- 230000032683 aging Effects 0.000 claims description 3
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Description
第１図は本考案による一実施例を示すエージン
グ装置の概略斜視図、第２図は同装置の要部断面
図である。
１：第１基板、２：半導体装置、３：ソケツト
、４：透孔、５：第２基板、６：突起。
FIG. 1 is a schematic perspective view of an aging device showing one embodiment of the present invention, and FIG. 2 is a sectional view of a main part of the same device. 1: first substrate, 2: semiconductor device, 3: socket, 4: through hole, 5: second substrate, 6: protrusion.
Claims (1)
半導体装置を搭載してエージング処理するための
装置において、 半導体装置を搭載するための第１基板と、 該第１基板の配線と電気的接続されて、半導体
装置を保持するソケツトと、 該ソケツトが取付けられた基板領域に穿設され
た透孔と、 該透孔に挿通される突起が、上記第１基板に形
成された透孔に対応させて設けられた第２基板と
を備えてなることを特徴とする半導体装置エージ
ング装置。[Scope of claim for utility model registration] On a board with wiring for power supply,
An apparatus for mounting a semiconductor device and performing an aging process, comprising: a first substrate for mounting the semiconductor device; a socket electrically connected to the wiring of the first substrate to hold the semiconductor device; and the socket for holding the semiconductor device. A through hole is formed in the area of the attached substrate, and a second substrate is provided in which a protrusion inserted into the through hole corresponds to the through hole formed in the first substrate. A semiconductor device aging device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP743486U JPS62119677U (en) | 1986-01-21 | 1986-01-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP743486U JPS62119677U (en) | 1986-01-21 | 1986-01-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62119677U true JPS62119677U (en) | 1987-07-29 |
Family
ID=30790879
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP743486U Pending JPS62119677U (en) | 1986-01-21 | 1986-01-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62119677U (en) |
-
1986
- 1986-01-21 JP JP743486U patent/JPS62119677U/ja active Pending