JPS62114218A - Annealing method for compound semiconductor - Google Patents

Abstract

PURPOSE:To alleviate a strain of a substrate in annealing step and to cope with a large-diameter substrate by mounting the substrate at a predetermined position of lower temperature than annealing temperature, then gradually heating it at a predetermined rate to raise the substrate temperature to the annealing temperature, holding the annealing temperature for a predetermined time to anneal it, and then gradually cooling it at a predetermined rate to a predetermined temperature. CONSTITUTION:After a substrate is heated to 400-600 deg.C (T1) before the substrate is heated to an annealing temperature Ta, it is gradually heated at a predetermined rate of the degree that Si ions are not diffused at approx. 5-15 deg.C, heat treated at the annealing temperature Ta, and gradually cooled at approx. 5-15 deg.C to the temperature T1. Thus, a strain to a GaAs substrate crystal is alleviated to control thermal strain at temperature rising to the annealing temperature or cooling from the annealing temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for annealing compound semiconductors, and more particularly to a method for activating an ion-implanted active layer.

(Prior art) In explaining the conventional method, we will use a gallium arsenide (hereinafter referred to as GaAs) field effect transistor (hereinafter referred to as F'ET).
The manufacturing method will be described.

Conventionally, GaAa I using GaAs FET devices
In C, the active region of the FET is usually formed by ion implantation. This is done by selective ion implantation into a GaAa semi-insulating substrate using a resist or the like as a mask. After that, a heat treatment step is required to activate the injection layer after removing the mask material.
et al; Journal of Applied Phys
ics).

24 (1985) pp L35-L38, or the electric furnace method described in Reference H, Kohzu et al.
; Journal of Applied Finox (Jou
rnal of Applied Physics)
, 54(9), 1983, pp 4998
The lamp annealing method described in Japanese Patent No. 5003 is used.

Electric furnace annealing is a method in which an ion-implanted GaAs substrate is protected with an insulating film (for example, SiO2, 5i3N4) and then annealed, and is usually called a cap annealing method.

Also, without forming an insulating film, A
A capless annealing method is used in which annealing is performed by applying s pressure to prevent As from leaving the GaAs substrate.

Further, the lamp annealing method heats only the active layer surface of the substrate for a short time (several seconds) and is also called a flash lamp annealing method or a rapid thermal annealing method.

After forming the active region by such a method, the FET is formed by forming the r-to electrode and the north drain electrode.
is made.

(Problems to be Solved by the Invention) However, in all of the annealing methods described above, the ion implantation region is rapidly heated to the annealing temperature and cooled from the annealing temperature. The slow cooling process from the annealing temperature is not controlled. Therefore, there have been problems such as introduction of crystal defects into the GaAs substrate due to thermal strain, and furthermore, the application to large-diameter substrates is technically unsatisfactory.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a compound semiconductor annealing method that reduces strain on the substrate during the annealing process, can effectively handle large-diameter substrates, and has good reproducibility. .

(Means for Solving the Problems) This invention provides a method for installing a compound semiconductor substrate into which impurities are ion-implanted at a predetermined position at a temperature lower than an annealing temperature.
After that, the substrate temperature is raised to the annealing temperature by slow heating at a predetermined rate, and after annealing by holding at the annealing temperature for a predetermined time, the temperature is brought to the predetermined temperature by slow cooling at a predetermined rate. be.

(Function) In the present invention, the GaAs substrate is first set at a temperature of 400° C. to 600° C. below the temperature at which As dissociates, and then the substrate temperature is raised to the 5-b annealing temperature and annealed.
Since the temperature is set to a predetermined value by ~b, thermal distortion of the GaAs substrate due to activation annealing of the ion-implanted region can be reduced.

(Example) The figure is a diagram showing the relationship between annealing temperature and time, and examples will be explained below using this diagram.

First, the manufacturing process of a GaAs Schottky dart FET using the direct ion implantation method will be described as an example.

Typically, the active region of a GaAs Schottky gate FET 0n-type conducts silicon (Si) ions at 60 keV to 100 keV.
G under the implantation conditions of an acceleration energy of about keV and an implantation dose of about 1012 to 1013 doses/crn2.
After ion implantation into the aAs substrate, annealing is performed at about 800° C. for 20 to 30 minutes to form the silicon.

The heat treatment process for this activation employs a one-hour temperature program as shown in the figure. First, set the substrate at a predetermined position and set the substrate temperature to TI (400℃~600℃).
That is, the substrate is set at a temperature below the temperature at which As in the GaAs substrate dissociates and there is no annealing effect (activation of the ion implanted region), and then the annealing temperature T is continuously applied.

(800-900℃), constant heating rate 5-15℃
/min (HR) to reduce heat. Next, heat treatment is performed at an annealing temperature Ta, followed by a constant slow cooling rate of 5 to b.

In the embodiment of the present invention, as shown in the figure, before heating the substrate to the annealing temperature Ta, 400°C to 600°C (Tt
), the temperature is reduced to approximately 5 to 15°C, at a constant rate to prevent Si ions from diffusing, followed by heat treatment at an annealing temperature of T, and then slowly cooled to approximately 5 to 15°C to form the substrate. Since the temperature is set at TI, strain on the GaAs base crystal is reduced, and thermal strain during heating up to the annealing temperature or cooling from the annealing temperature can be controlled.

(Effects of the Invention) As described above in detail, according to the present invention, it is possible to reduce the strain on the GaAs base crystal that occurs during annealing of a compound semiconductor base, and it can be used as an annealing method for large diameter substrates. It is valid.

[Brief explanation of drawings]

The figure is a diagram showing the relationship between temperature and time for detailed explanation of the present invention. T1...Substrate temperature at the start of slow heating and end of slow cooling, HR
... Annealing rate to the annealing temperature, Ta... Annealing temperature, CR... Annealing rate from the annealing temperature to T1. Patent applicant: Oki Electric Industry Co., Ltd. Invention A. 114 years ago

Claims (1)

[Claims] 1. Annealing is performed by heating a compound semiconductor substrate into which impurity ions have been implanted from a predetermined temperature at a predetermined rate to an annealing temperature, and then annealing at a predetermined rate. A method for annealing a compound semiconductor, the method comprising: heating a compound semiconductor to a predetermined temperature. 2. The predetermined rate of slow heating and slow cooling is 5 to 15, respectively.
2. The method of annealing a compound semiconductor substrate according to claim 1, wherein the annealing rate is .degree. C./min. 3. The method of annealing a compound semiconductor substrate according to claim 1, wherein the predetermined temperatures of the compound semiconductor before and after the slow heating are respectively 400°C to 600°C.