JPS62109325A - Manufacture of high speed semiconductor element - Google Patents

Abstract

PURPOSE:To reduce a leakage current on a junction surface at voltage applying time at high temperature by forming a bevel at a semiconductor substrate before diffusing a life time killer, and forming an N<+> type layer by diffusing phosphorus on the bevel oblique surfaces. CONSTITUTION:A P<+> type layer 2 is formed on an N-type silicon substrate, oblique surfaces 7 are formed in bevel shape, the layer 2 is then covered with an oxide film 3, N<+> type layers 4 are formed on the opposite surface to the layer 2 and the surfaces 7 by diffusing phosphorus, the film 3 of the P<+> type side is removed, and life time killer such as Au, Pt is diffused. Then, the killer is collected by the phosphorus of the layer 4 to prevent it from diffusing into the interior to reduce the killer distribution near the surfaces 7, thereby reducing a reverse current leakage on the junction surface.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention relates to a method for manufacturing high-speed semiconductor devices in which lifetime killers such as gold and platinum are diffused to reduce lifetime.

[Prior art and its problems]

For example, manufacturing a high-speed diode with a short reverse recovery time for a large-capacity element is conventionally performed by a process as shown in FIG. 3. First, a P' layer 2 is formed on one side of a disc-shaped N-type silicon substrate 1 (Figure C), that side is covered with an oxide film 3 (Figure b), and an N' layer 4 is formed on the other side. After diffusing and introducing a lifetime killer such as Au or Pt from the P'' layer 2 side, this solicon substrate is brazed to a metal support plate 6 such as Mo or W via A75 (Fig. d). ), and then a hevel process is applied to reduce the surface electric field strength to form the inclined surface 7 (Fig. When introduced, the lifetime near the exposed portion of the bonding surface becomes as bad as the inside of the substrate, and the reverse leakage flow at the bonding surface increases especially at high temperatures, impairing the stability of the reverse prevention ability.

[Purpose of the invention]

An object of the present invention is to solve one of the above-mentioned problems, to prevent an increase in reverse leakage current at the bonding surface of a semiconductor substrate, and to provide a method for manufacturing a high-speed semiconductor device with stable reverse blocking ability. do.

[Key points of the invention]

In the diode substrate 1 shown enlarged in FIG. 4, the present invention has a diode substrate 1 in which almost no current flows in the inclined portion A of the substrate 1 existing between the bevel inclined surface 7 and the support plate 6 when the diode is energized in the forward direction. Therefore, it should be noted that even if the lifetime of the inclined portion A is longer than the lifetime of the interior B of the substrate 1, it will not impede the desired high speed, since there is almost no injection of carriers to disappear during reverse recovery. In a method for manufacturing a high-speed semiconductor device in which NII is formed by diffusing phosphorus from one surface, an inclined surface is formed on the semiconductor substrate so as to obtain a predetermined bevel angle, and then the inclined surfaces are combined. By diffusing phosphorus from a predetermined surface and then diffusing the lifetime killer from the surface where no phosphorus diffusion layer exists, the diffusion of the lifetime killer to the sloped surface is inhibited by phosphorus, and the bonding when reverse voltage is applied at high temperature is prevented. The above objective is achieved by reducing the increase in leakage current in the surface area.

Embodiments of the Invention FIGS. 1 and 2 show embodiments of the present invention, and parts common to those in FIG. 3 are given the same reference numerals. In Fig. 1, as in Fig. 3 (al), a P'' layer 2 is formed on an N-type silicon substrate (Fig. a), an inclined surface 7 is processed to form a heave (Fig. b), and then a P' layer 2 is formed on the N-type silicon substrate (Fig. 1). Cover the top with an oxide film 3 (Figure C), and then form a N layer 4 on the surface opposite to the P'' layer 2 and on the inclined surface 7 by phosphorus diffusion (Figure d), P
By removing the oxide film 3 on the "side" and diffusing and introducing lifetime killers such as Au and Pt (Fig. As a result, the lifetime killer distribution in the vicinity of the inclined surface 7 is reduced (and the reverse leakage current at the bonding surface area can be reduced).After this, the support plate 6 is brazed and the inclined surface If the N layer 4 of No. 7 is removed by etching or the like, an element similar to that shown in FIG. 3+81 can be obtained (Fig. B).
By changing the process shown in el, the oxide film 3 on the surface circumference of the 20 layers 2 of the silicon substrate 1 is removed (Figure a). As a result, dust diffuses and enters the surface side facing the inclined surface 7 (Figure b), and as a result, the lifetime killer distribution near the bonding surface becomes smaller. After this, the P'' layer 2
After the N'' layer 41 diffused around the periphery of the silicon substrate 1 is removed by cutting or etching, the silicon substrate 1 is brazed to the support plate. Since this process is performed before the silicon substrate, there is no need to tilt the metal support plate, which is less workable than the silicon substrate, and is far superior to the conventional technique shown in Figure 3, in which the silicon substrate is heveled together with the metal support plate. Another advantage is that bevel formation can be easily performed.Although the above embodiments have been described with respect to high-speed diodes,
The same can be effectively applied to high-speed cyrisks.

【Effect of the invention】

According to the present invention, the semiconductor substrate is bevel-processed before the lifetime killer is diffused for high-speed semiconductor device manufacturing, and an N'' layer is formed by dust diffusion on the bevel slope, thereby reducing phosphorus. Due to the getter action, the lifetime killer distribution in the vicinity of the junction exposed on the slope is reduced, maintaining the lifetime and reducing leakage current at the junction surface when voltage is applied at high temperatures, resulting in a high-speed device with stable blocking ability. A semiconductor element can be obtained.

[Brief explanation of drawings]

FIG. 1 is a sectional view sequentially showing the steps of one embodiment of the present invention, FIG. 2 is a sectional view showing a different part of the process of another embodiment from the step in FIG. 1, and FIG. 3 is a conventional high-speed diode. FIG. 4 is an enlarged sectional view of the heel portion of the high-speed diode. 1: Silicon substrate, 3: 61-oxide film, 4: Phosphorous diffusion layer, 7
: Slope around 1. Figure 1 Figure 3

Claims (1)

[Claims] 1) When manufacturing a high-speed semiconductor device having an N conductivity type layer formed by diffusing phosphorus from one surface, after forming an inclined surface on the semiconductor substrate to obtain a predetermined bevel angle, the inclined surfaces are combined. 1. A method for manufacturing a high-speed semiconductor device, comprising: diffusing phosphorus from a predetermined surface, and then diffusing a lifetime killer from a surface where the phosphorus diffusion layer does not exist.