JPS62102486A - Pcm recording and reproducing device - Google Patents

Abstract

PURPOSE:To reduce possibility that a series C2 in a lateral direction cannot be erased or corrected and the correction is overlapped by setting a block error flag when an error is detected by the parity inspection of a block address. CONSTITUTION:When the parity of a code word including the block address of a PCM reproduction and demodulation output is inspected by a block address parity inspecting device 31 to detect an error, the falg is set at an address position corresponding to a block error flag table. A C1 correcting device 34 does not correct a series C1 in a longitudinal direction where the flag showing the correction failure is set. On the other hand, a C2 correcting device 35 corrects the series C2 with the flag as a pointer, and the possibility that the series C2 cannot be erased or corrected or the correction is overlooked can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a POM recording and reproducing apparatus that converts analog signals such as audio into PCM and records and reproduces them using a rotary head.

Conventional Technology A so-called digital audio tape recording and reproducing system was decided upon, in which an analog signal such as audio is converted into a PCM signal, and the PCM signal is recorded and reproduced on a magnetic tape using a rotary head.

The conventional PCM recording method mentioned in - will be explained below with reference to the drawings. FIG. 4 shows track rows on a magnetic tape using two rotary heads. In FIG. 4, 23 is a magnetic tape, 25 is a tape running direction, 24 is a head running direction, and 26 is an azimuth angle of -α.
The track 27 has an azimuth angle of +α0 (−azimuth track), and the track 27 has an azimuth angle of +α0 (+azimuth track). At the same time as the tape runs in the tape running direction 25, the rotary head runs in the head running direction 24. At this time, 2
Each head has 4 different azimuth angles (+α0゜-C0)
Since the magnetic tape 23 has an azimuth angle of -
Tracks 26 and 27 C0, +α0 are recorded.

Each track also includes a track-complete error correction code (
A double Reed-Solomon code: C1, 02) is added.

FIG. 5 shows data in the buffer memory divided into blocks when a PCM signal of one trunk is reproduced, and shows that the data is composed of 128 blocks. In FIG. 6, 1 is a block number, 2 is a synchronization signal, 3 is an identification code, 4 is a block address, 5 is a parity, 6 is PCM data, and 10 is a text other than a signal.
In the figure, the hexadecimal code is indicated by FF.

11 is C1 parity, and 12 is C2 parity.

One track of data is borrowed in the r1f raw direction 13, and each block is assigned an identification code 3. Block address 4. A parity check is performed on the code word made +II by parity 5, and if there is no error, the data of the block is stored in the position in the buffer memory indicated by block address 4.

FIG. 6 is a conventional example of the algorithm which is a reproduction of the founder's diagram. In the same figure, step 14 is a parity check of the code H (including the block address), step 16 is a parity check to determine whether there is an error on the right side, step 16 is the transfer of a prosocket, step 18 is a determination of the end of all block data transfer, and step 20 is 01 correction, step 22 is C1
This is a determination that all series correction has been completed.

Problems to be Solved by the Invention However, in the above configuration, if the parity check is incorrect, for example in block 1, the PCM data is not transferred to the buffer memory and the block is Data 1o other than signals is stored. - Perform 01 and 02 error correction under Situation 6 Beno. However, C
The first direction is the vertical direction, and the C2 direction is the horizontal direction. When error correction is performed on the C1 sequence including block 1, almost all of the data in Glock 1 is erroneous, which exceeds the error detection ability.

A case may occur in which an error is overlooked due to erroneous correction and the C1 error flag, which indicates that an error exists in the C1 sequence, does not light.

Since the C1 error flag is used as a pointer in erasure correction in the C2 direction, there is a problem in that the erasure correction is impossible or the erasure correction is missed.

In view of the above-mentioned problems, the present invention provides a method for reducing misses caused by reproduction PCM0M data arrangement by parity checking of code words including the above-mentioned block addresses.

Means for Solving the Problems In order to solve the above problems, the present invention includes a block error flag table indicating that an error is detected by parity check of a code word including the block address, Sets a flag in the block error table without performing error correction for the C1 series where is set,
The configuration is such that this can also be used as a pointer during 02 correction.

Effect of the present invention With the above-described configuration, when an error is detected by parity check of a code word including the block address, a flag is set in the block error table, and a pointer used for 02 correction is set to the block error table. If the flag is included, the erasure pointer will not be missed when erasure correction is performed in the C2 direction, and it is therefore possible to significantly reduce oversights due to erroneous correction.

EXAMPLE An example of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a main part of a PCM recording/reproducing apparatus according to an embodiment of the present invention, FIG. 2(a) is a block error flag table, and FIG. - The number of blocks is set to 2 (K is a natural number) so as not to impair film properties.

In FIG. 1, numeral 31 is a block address parity check device that divides one track of PCM data into blocks (K is a natural number) and checks the parity of each block as shown in FIG. 2(b). When no block error is detected, the block data is transferred to the block data storage device 32, and data "φ" indicating that no block error is detected is stored in the block error flag table 33 as shown in FIG. 2(a). When a block error is detected, the block error flag table 33
Block error flag data “1” is set to 34.
is a C1 correction device, which corrects the 01 series of block data if the data in the block error flag table is "φ°", and sets a C1 uncorrectable flag if the data is "1°". 36 is a C2 correction device that corrects the C2 sequence.

In FIG. 2, 7 is a block address, 8 is flag data "φ" when no error is detected by the parity check of the code word containing the block address, and 9 is flag data "1" when an error is detected by the above check. “is.

Here, if the C1 series spans two blocks, it goes without saying that flag data "1°" is written across the two blocks in the block error flag table.

When an error is detected by the parity check of the code word including the block address in process 1 in the reproduced data shown in FIG. In this embodiment where ° is written and shuffled, the C1 series is written in blocks j, j
+1 (j: positive integer), so the flag data "1°" is also written in block φ.The uncorrectable flag at the time of C1 correction is at least added to the C1 series flagged in the block error flag table. By doing this, C1 in the conventional technology
It is possible to prevent a phenomenon in which a C1 sequence containing an error is not flagged due to oversight due to direction error correction. Therefore, in erasure correction in the C2 direction using the 01 uncorrectable flag 9, as an erasure pointer, the probability of uncorrectable or missed errors can be significantly reduced. Although the present embodiment has been described with reference to the case where a block error exists in block 1, it is clear that the same effect will occur when errors exist in other blocks.

FIG. 3 shows an example of the embodiment of the present invention shown in FIG. 1 above.
This is J-X Mu. In the figure, step 1A is a process of setting a flag in the block error flag table, step 19 is a process of determining whether the block error flag is set or not, and step 21 is a process of setting a C1 uncorrectable flag.

As described above, according to this embodiment, a block error flag is set due to a parity check error in a block address, and a C1 uncorrectable flag is set for the C1 sequence for which the block error flag is set, thereby making C2 erasure uncorrectable. 02 correction can be reduced.

Note that the above 01 correction processing is not performed continuously over 10.1 blocks, and 71cA is an integer, A<K'
) It goes without saying that when processing is performed block by block, the capacity of the -1-based block error flag table may be 1-pi.

Effects of the Invention As described above, the present invention performs a harness check on a code word containing a block address of data from the rotary head.
If no error is detected, the block is stored in the random access memory area indicated by the block address, and if an error is detected, the block error flag table is provided to store the block in error. By setting the 01 uncorrectable flag without performing error correction on the C1 sequence in which the error occurs, it is possible to reduce the uncorrectable C2 erasure and the possibility of C2 correction being missed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the main part of a PCM recording/reproducing apparatus according to an embodiment of the present invention, and FIGS. 2(a) and 2(b) show the same block error table and track data 11A-
',' Format diagram; Figure 3 is a format diagram showing the upper track row in the embodiment of the present invention; Figure 6 is a format diagram showing track data; Figure 5 is a flowchart showing the algorithm of a conventional PCM recording/reproducing device. Yes. 1...Block number, 2...Synchronization signal, 3...Identification code, 4...Block address, 6...Parity , 6...P
CM data, 7...Block address, 8...
...Data indicating that no block error is detected "φ", 9...Block error flag "1", 1
0... Data FF other than signals, 11...
・C1 parity, 12...C2 parity, 13
...Playback direction, 14...Block address parity check, 16...Determination of presence or absence of error,
16... Transfer of block data, 17...
...Processing to set block error flag, 18...
- Determination of completion of all block transfer, 19... Determination of whether block error flag is 1 or φ, 20...01
Correction, 21...Processing to set C1 uncorrectable flag, 22...Determination whether all C1 series are completed, 3
1...Block address parity check device, 3
2...Block data storage device, 33...Block error flag table, 34...01 correction device, 36...C2 correction device i11゜Name of agent Patent attorney Toshio Nakao and one other figure 5 // Cl Pa1) Tee figure 6

Claims (1)

[Claims] PCM data is recorded and reproduced on a recording medium as one track by n rotating heads, and double or more product codes (C_1, C_2, ...) are used as error correction codes, and when recording, one track is PCM data is divided into K blocks (K is a natural number), a synchronization signal and the address parity of each block are recorded in each block, and the output data from the rotary head is taken in at the time of decoding. =0, 1, 2, ...k_-_1), and a parity check device that performs a parity check on a code word containing a block address of m (m=0, 1).
, 2, . and a C_1 error correction device that sets a C_1 uncorrectable flag without performing error correction on the C_1 series whose block error flag is set in the block error flag table. PCM
Recording and playback device.