JPS61145771A - Pcm recorder - Google Patents

Abstract

PURPOSE:To minimize the number of error blocks even in case a block shift is produced and also to reduce the probability for overlook of an omitted block, by giving a parity check to the output data given from a rotary head after storing it temporarily to the 1st random access memory and then storing the error data. CONSTITUTION:The data on the blocks following a block l10 on the 1st random access memory shown in figure (a) are stored to blocks (m), (m+1)... shown by block addresses (m), (m+1)... on the 2nd random access memory shown in figure (b). Thus the errors are limited between blocks (l) and (m-1) and therefore the number of error blocks can be decreased. Then the data excepting 0, e.g., an FF (16-notation) are stored to the areas of data 7 on blocks (l)-(m-1) which are erased by a block shift, a P parity 8 and a Q parity 9. Therefore the probability where the syndromes Sj are all set at 0 is extremely small. Thus it is possible to confirm easily the blocks which are erased by the block shift as the correction unable blocks.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a PCM recording device that converts analog signals such as audio into iPcM and records and reproduces them using a rotary head.

Conventional technology In recent years, analog signals such as music are converted into iPcM signals,
A so-called digital audio tape recording and reproducing system has been proposed in which the PCM signal is recorded and reproduced on a magnetic tape using a rotating head.

The conventional paM recording method described above will be explained below with reference to the drawings. In the track data format, PCM data of one track is divided into blocks from o to -1.In the figure, 1 is the block number, 2 is the recording direction, 3 is the synchronization signal, and 4 is the identification. code, 6
is a block address, 6 is a parity, 7 is data, 8 is a P parity for error correction, and 9 is a Q parity for error correction. The error correction code is a double lead-don lomo/code.

PCM data is stored in blocks 0 and 1 along recording direction 2.
,2. ..., are recorded in the order of -1.

Each block consists of 32 symbols (1 symbol = 8 bits). The block address 5 records the number of each block. The use of the above-mentioned identification code 4 is not particularly defined.

Problems to be Solved by the Invention However, with the above configuration, problems occur in the following cases. In other words, if the synchronization signal 3 recorded at the beginning of each block fails to be detected, a second error occurs in the βth area of the first random access memory that captures the output data from the head. It is possible that the mth block is not stored and the mth block is stored with a shift.

In such a case, there is a problem in that all data from the second block onwards are erroneous.

In view of the above-mentioned problems, the present invention provides a PC that minimizes the number of erroneous blocks even when a block shift occurs and reduces the probability of missing blocks being missed.
The present invention provides an M recording device.

Means for Solving the Problems In order to solve the above problems, the present invention stores output data from the rotary head once in a first random access memory, and then stores it in a second random access memory (lo).

1.2. . . . -1)), and if the above block address is correct and "("=os', 2+"'Hkl), then the second block The data is stored in the m-th area on the second random access memory, and error data other than O is stored in other areas on the second random access memory.

Effect of the Invention With the above-described configuration, when a block shift occurs such as when a synchronization signal is not detected, the block address of each block is checked for correctness by parity check, and then the block address is checked for correctness. Erroneous blocks can be kept to a minimum by storing them in the specified area, and since error data other than O is recorded in advance as the data of the missing block, uncorrectable programs can be saved when correcting errors in the P direction. It is possible to easily detect the error and reduce the probability of missing the uncorrectable block.

EXAMPLE An example of the present invention will be described below with reference to the drawings. FIG. 1 shows a data format in one embodiment of the present invention. In FIG. 1, 1 to 6 are the same as in FIG. 10 is a block j, 11 is a block address m112 is a symbol FF. Note that FIG. 1 (ml is the data array on the first random access memory that stores output data from the rotary head;
Figure (bl) is the data arrangement on the second random access memory to which the data in the first random access memory has been transferred.

The operation of the above configuration will be explained below using FIG. 1. In FIG. 1 (&), block o, ri0 to block 1-
1) stores the correct block addresses 0 to 1t-1), and since there is a block shift after block β, block J10 stores the data at block address m, and block ([+1) stores the block address m). Data at address (m+1) is stored. Figure 1 above (
If the ILI data is corrected as it is, block β
All subsequent data will be incorrect.

Therefore, the data after block/10 on the first random access memory shown in (2L) of the same figure is shown in (b) of the same figure.
On the second random access memory shown in FIG. -1)
Thus, the number of false 9 blocks can be reduced.

Furthermore, the block β that disappears due to the above block shift
- Store data other than ○, for example, FF (hexadecimal number) 'f, in the data 7, P parity 8, and Q parity 9 areas of block (m-1). According to the above-mentioned DAT conference materials, P parity and Q parity are determined by the following equations during code generation.

HP-vP=o(1) HQ-vQ=0(2I Equation (1) I In (2), HP is a P-direction parity check matrix, Hq is a Q-direction parity check matrix, and is expressed by the following equation.

hP=[H! ,](31 Eco HP, = tt(sz-co)(i-+)
(41 Eco HQ = CHQ,) (5) Eco HQ, = , (sz-j) (i-1)
(6) Eco Also, α is the primitive light on the Galois extension field GF (28) and is expressed by the following equation.

a=(00000010) (7) Also v
P and vQ are vectors whose elements are symbols in the P and Q directions, respectively. Each element of the vector vP is a block r, r
It is a symbol that stands at +1 (r=o, 2.4+...). On the other hand, in the decoder, that is, during reproduction, error correction is performed based on the syndrome S,2 shown in the following equation.

Here, Wi means each symbol in the P and Q directions.

At the time of decoding, the syndrome Sj expressed by the above equation (8)
is calculated, and if all of the syndromes Sj are O, it is considered that there is no error. Here, if data 0 is stored in data 7, P parity 8, and Q parity 9 of blocks 2 to (m-1) that disappear due to the above block shift, the syndrome expressed by equation (8) is completely eliminated. 0, making it impossible to detect an error.

However, according to the above embodiment, data other than Q, such as FF (hexadecimal number), is stored in the data 7, P parity 8, and Q parity 9 of the block β-block (m-1) that disappears due to the block shift. The probability that all syndromes Sj expressed by the above equation (8) will be Q is extremely low. Therefore, a block that disappears due to the block shift can be easily confirmed as an uncorrectable block.

Furthermore, in order to be able to reliably detect uncorrectable blocks when inspecting the syndrome Sj, the element symbols of the vector vP must be the block r.

Since it spans r+1 (r=o, 2, 4.''), FFs can be stored in data 7, P/parity 8, and Q parity 9 of the two blocks r and r+1.

If double error correction is performed in the P direction by the above operation, one of the error positions will be larger than 31, so that an uncorrectable block can be reliably detected.

Wear.

As described above, at the time of decoding, the output data from the rotary head is stored in the memory area specified by the address of each block, and the blocks that disappear due to block shift are zeroed out.
By storing the data in a different format, it is possible to reduce the number of erroneous 9 blocks, and it is also possible to easily detect that the erased block is an uncorrectable block.

Effects of the Invention As described above, the present invention stores all output data from the rotary head in the first random access memory during decoding, then checks the integrity of the block address of each block, and if the block address is correct, the block address of the block is The number of error blocks is reduced by storing data in the area designated by the block address on the second random access memory and storing non-zero data in the lost area on the second random access memory. is possible,
In addition, it is possible to easily detect that the erased block is an uncorrectable block.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing block error correction in an embodiment of the present invention, and FIG. 2 is a conventional data format. 1...Block, 2...Recording direction, 6
...Block address, 7...Data, 8...Pno (Retei, 9...Q parity, 1o...Block!, 17...
Block address m, 12...FF (hexadecimal). Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (2)

[Claims] (1) PCM data is recorded and reproduced as one track on a recording medium by n rotary heads, one track of PCM data is divided into k blocks, and each block is given a synchronization signal and each block is After storing the output data from the rotary head in the first random access memory during decoding, the l-th address (l=0, 1, 2,
...k-1) block address is parity-checked,
The above block address is correct m (m=0, 1, 2, ・
...k-1), then the l-th data above is
A PCM recording device characterized in that data is stored in an m-th area of a second random access memory, and data that facilitates error detection in an error detection device is stored in a lost area on the second random access memory. (2) On the second random access memory, if the i-th block is an error, the (i+1)-th block if i is an even number, and the (i-1)-th block if i is an odd number.
1) The PCM recording apparatus according to claim 1, wherein error data is also stored in the th block.