JPS6210011B2 - - Google Patents
Info
- Publication number
- JPS6210011B2 JPS6210011B2 JP54064259A JP6425979A JPS6210011B2 JP S6210011 B2 JPS6210011 B2 JP S6210011B2 JP 54064259 A JP54064259 A JP 54064259A JP 6425979 A JP6425979 A JP 6425979A JP S6210011 B2 JPS6210011 B2 JP S6210011B2
- Authority
- JP
- Japan
- Prior art keywords
- resist
- substrate
- pattern
- exposure
- mark
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Electron Beam Exposure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6425979A JPS55156329A (en) | 1979-05-24 | 1979-05-24 | Manufacture for integrated element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6425979A JPS55156329A (en) | 1979-05-24 | 1979-05-24 | Manufacture for integrated element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55156329A JPS55156329A (en) | 1980-12-05 |
| JPS6210011B2 true JPS6210011B2 (enExample) | 1987-03-04 |
Family
ID=13253004
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6425979A Granted JPS55156329A (en) | 1979-05-24 | 1979-05-24 | Manufacture for integrated element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55156329A (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6010624A (ja) * | 1983-06-29 | 1985-01-19 | Mitsubishi Electric Corp | パタ−ン形成方法 |
-
1979
- 1979-05-24 JP JP6425979A patent/JPS55156329A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55156329A (en) | 1980-12-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7282422B2 (en) | Overlay key, method of manufacturing the same and method of measuring an overlay degree using the same | |
| US5128283A (en) | Method of forming mask alignment marks | |
| US4640888A (en) | Alignment mark on a semiconductor and a method of forming the same | |
| EP0230648B1 (en) | Method of forming an alignment mark | |
| JPS6210011B2 (enExample) | ||
| JPH0513372B2 (enExample) | ||
| JPH11317340A (ja) | 重ね合わせ精度測定用マーク及びそれを用いた測定方法 | |
| JP2822938B2 (ja) | 重ね合わせ精度の測定方法 | |
| JP2674093B2 (ja) | 位置合わせ方法 | |
| JPS6154621A (ja) | 図形重ね合わせ用基準マ−ク | |
| JPS6232612B2 (enExample) | ||
| JPS5923516A (ja) | 重ね合せ位置基準図形の設置方法 | |
| JPH06177027A (ja) | 電子ビーム描画方法及び半導体装置 | |
| KR20050039086A (ko) | 오버레이 키이 및 이 키이를 이용한 오버레이 측정 방법 | |
| JPS6227728B2 (enExample) | ||
| JPH0544172B2 (enExample) | ||
| JPH0729799A (ja) | レジストパターンの形成方法 | |
| JPS58114430A (ja) | レジスト膜のパタ−ン形成方法 | |
| JPS631315Y2 (enExample) | ||
| JPS6210008B2 (enExample) | ||
| JP2002025899A (ja) | アライメントマークおよびアライメント方法 | |
| JPS5984428A (ja) | パタ−ン形成方法 | |
| JPS59114819A (ja) | 半導体装置 | |
| JPH07111231A (ja) | 半導体装置およびその製造方法 | |
| JPH05226219A (ja) | 露光装置の位置合せ方法 |