JPS619834U - semiconductor wafer - Google Patents

semiconductor wafer

Info

Publication number
JPS619834U
JPS619834U JP9362084U JP9362084U JPS619834U JP S619834 U JPS619834 U JP S619834U JP 9362084 U JP9362084 U JP 9362084U JP 9362084 U JP9362084 U JP 9362084U JP S619834 U JPS619834 U JP S619834U
Authority
JP
Japan
Prior art keywords
semiconductor wafer
view
recorded
tweezers
sectional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9362084U
Other languages
Japanese (ja)
Inventor
義孝 青木
Original Assignee
日本電気アイシ−マイコンシステム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気アイシ−マイコンシステム株式会社 filed Critical 日本電気アイシ−マイコンシステム株式会社
Priority to JP9362084U priority Critical patent/JPS619834U/en
Publication of JPS619834U publication Critical patent/JPS619834U/en
Pending legal-status Critical Current

Links

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例による半導体ウエハーの平面
図、第2図は本考案の一実施例による半導体ウエハーの
運搬に便利なピンセットの断面図、第3図はかかるピン
セットで本考案の一実施例による半導体ウエハーを持っ
た状態での断面図である。 第4図は従来の半導体ウエハーの平面図、第5図はピン
セットの断面図で、第6図はビンセットで半導体ウエハ
ーを持った状態での断面図である。 11・・・従来の半導体ウエハー、12・・・切り込み
、21.51・・・ピンセット、41・・・本考案によ
る半導体ウエハー、42・・・穴、52・・・ピンセッ
トに付いている棒。
FIG. 1 is a plan view of a semiconductor wafer according to an embodiment of the present invention, FIG. 2 is a sectional view of tweezers convenient for transporting semiconductor wafers according to an embodiment of the present invention, and FIG. FIG. 1 is a cross-sectional view of a semiconductor wafer according to an embodiment. FIG. 4 is a plan view of a conventional semiconductor wafer, FIG. 5 is a cross-sectional view of tweezers, and FIG. 6 is a cross-sectional view of a semiconductor wafer held in a pin set. DESCRIPTION OF SYMBOLS 11... Conventional semiconductor wafer, 12... Notch, 21.51... Tweezers, 41... Semiconductor wafer according to the present invention, 42... Hole, 52... Rod attached to tweezers.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少なくとも1ヶの貫通した穴を有することを特徴とする
半導体ウエハー。
A semiconductor wafer characterized by having at least one through hole.
JP9362084U 1984-06-22 1984-06-22 semiconductor wafer Pending JPS619834U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9362084U JPS619834U (en) 1984-06-22 1984-06-22 semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9362084U JPS619834U (en) 1984-06-22 1984-06-22 semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS619834U true JPS619834U (en) 1986-01-21

Family

ID=30651461

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9362084U Pending JPS619834U (en) 1984-06-22 1984-06-22 semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS619834U (en)

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