JPS6196777A - 全周囲発光体 - Google Patents

全周囲発光体

Info

Publication number
JPS6196777A
JPS6196777A JP59216350A JP21635084A JPS6196777A JP S6196777 A JPS6196777 A JP S6196777A JP 59216350 A JP59216350 A JP 59216350A JP 21635084 A JP21635084 A JP 21635084A JP S6196777 A JPS6196777 A JP S6196777A
Authority
JP
Japan
Prior art keywords
insulating base
electrodes
led chips
entire periphery
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59216350A
Other languages
English (en)
Other versions
JPH0421355B2 (ja
Inventor
Shotaro Yagi
八木 章太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hakuyo Denkyu KK
Original Assignee
Hakuyo Denkyu KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hakuyo Denkyu KK filed Critical Hakuyo Denkyu KK
Priority to JP59216350A priority Critical patent/JPS6196777A/ja
Publication of JPS6196777A publication Critical patent/JPS6196777A/ja
Publication of JPH0421355B2 publication Critical patent/JPH0421355B2/ja
Granted legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15158Shape the die mounting substrate being other than a cuboid
    • H01L2924/15162Top view

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Led Device Packages (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はLEDチップ(発光ダイオードチップ)を用い
た全周囲発光体に関する。
(従来の技術) LEDチップを用いた発光体として、基台の一面に該L
EDチップを接着したものが知られている。
(発明が解決しようとする問題点) 従来の発光体は、基板が遮光体であるためLEDチップ
による配光は限られた立体角内に制限されてしまい全周
囲に亘る配光が限られない不都合があった。
本発明はかかる不都合を解消すると共に各方向の光度を
増加することをその目的としたものである。
(問題点を解決するための手段) 本願の第1発明は、多面体から成る絶縁基台の面にLE
Dチップを配設したことを特徴するとし、第2発明は、
多面体から成り稜に突出する板状体を設けた絶縁基台の
面にLEDチップを配設したことを特徴とする。
(実施例) 第1図及び第2図は本発明の一実施例を示す。
図面において、(1)はセラミック、ガラス繊維入りエ
ポキシ樹脂等により例えば8稜の長さが15M程度の4
面体すなわち3角錐に形成された絶縁基台で、該基台(
1)の各面には図示のようなパターンで銀又は銀−パラ
ジウムからなる導電性インクを用いてシルク印刷等の方
法で電極(2a)(2b)及び回路(3)がプリントさ
れている。この電極(2a)にはそれぞれLEDチップ
(4)が導電性接着剤で接着され、その上面は超音波圧
接等の方法により溶接される金又はアルミニウム等の延
性に富んだ金属の微細線(5)により他の電極(2b)
と接続されている。
図において(6)はリードビン(7>の植設部で、リー
ドビン(1)は絶縁基台(1)の成形時にインサート成
形により植立させるかあるいは孔に嵌入し接着剤で固定
する。
図面には示さないが、電極(2a)(2b)にLEDチ
ップ(4)を接続した後透光性樹脂を絶縁基台(1)の
各面のボッティング等の方法かあるいはり−ドピン(7
)には触れないようにして基台(1)全体を透光性樹脂
液にディップする等の方法により被覆し、LEDチップ
(4)、微細線(5)等を保護する。
かくて、リードビン(7)にLEDチップ(4)に順方
向電流が流れるように直流電圧を加えると、互に並列に
接続されたLEDチップ(4)は−斉に発光し、全周囲
に亘って配光される。
この実施例では4面体゛の絶縁基台(1)を使用したが
、立方体、直方体等の6面体あるいはそれ以上の多面体
にすれば更に配光の均一性が向上する。
また絶縁基台(1)の前面にLEDチップ(4)を配設
したが、用途によっては必ずしも全面でなくてもよい。
更にまた絶縁基台(1)の各面には1個のLEDチップ
(4)を配設したが、複数個を配設してもよい。
第3図及び、第4図は本発明の他の発光体を示す。絶縁
基台(1)は、8稜に適宜の為さの板状体(8〉が基台
(1)の中心から放射方向に突出されて例えば接着によ
り設けられた4面体から成り、その上部の平坦部には前
記板状体(8)を補強するための3角柱部(9)が接着
され、その頂部にリードビン(7)が孔に挿入して植設
されている。
この絶縁基台(1)の各面に形成する電極(2a)(2
b)及び回路(3)並びに電極(2a)に接着するLE
Dチップ(4)はいずれも第1図及び第2図に図示のも
のと同様に作成されている。
尚、電極(2a)(2b)及び回路(3)の作成は3角
柱部(9)及び板状体(8)が4面体に取付けられる前
に行なわれる。
かくてリードビン(7)に直流電圧を加えると、各面の
LEDチップ(4)は発光し、8光は板状体(8)によ
って反射されるので各面の発光体の光度は増大する。
各面に配設されたLEDチップ(4)の光が異色である
場合等において、各面の光を板状体(8)で互に遮光す
れば各面の光が混合することが防止できる。
(発明の効果) 本発明は、多面体から成る絶縁基台の面にLEDチップ
を配設したので、LEDチップによる配光が全周囲に亘
って得られる効果を有し、また、多面体から成り稜に突
出する板状体を設けた絶縁基台の面にLEDチップを配
設したので各方面のLEDチップによる配光の光度を増
加させることができると共に各方面に異なる色を配光す
る場合等に互に混合しない効果を有する。
【図面の簡単な説明】
第1図は本発明の全周囲発光体の正面図、第2図はその
表面の展開図、第3図は本発明の他の全周囲発光体の斜
視図、第4図は平面図を示す。 (1)・・・絶縁基台 (2a)(2b)・・・電極 (3)・・・回路 (4)・・・LEDチップ (5)・・・微細線 (6〉・・・リードビンの植設部 (7)・・・リードビン (8)・・・板状体 外2名 第1図 第2図 第3図 第4図 手続補正書 昭和  69.11β0 ヨ 1、事件の表示 昭和59年特許願第216350号 2、発明の名称 全周囲発光体 3、補正をする者 事件との関係  特許出願人 舶坩;球株式会社 4、代 理 人 5、補正命令 の日付(自発)

Claims (1)

  1. 【特許請求の範囲】 1、多面体から成る絶縁基台の面にLEDチップを配設
    したことを特徴とする全周囲発光体。 2、多面体から成り稜に突出する板状体を設けた絶縁基
    台の面にLEDチップを配設したことを特徴とする全周
    囲発光体。
JP59216350A 1984-10-17 1984-10-17 全周囲発光体 Granted JPS6196777A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59216350A JPS6196777A (ja) 1984-10-17 1984-10-17 全周囲発光体

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59216350A JPS6196777A (ja) 1984-10-17 1984-10-17 全周囲発光体

Publications (2)

Publication Number Publication Date
JPS6196777A true JPS6196777A (ja) 1986-05-15
JPH0421355B2 JPH0421355B2 (ja) 1992-04-09

Family

ID=16687171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59216350A Granted JPS6196777A (ja) 1984-10-17 1984-10-17 全周囲発光体

Country Status (1)

Country Link
JP (1) JPS6196777A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016201408A (ja) * 2015-04-08 2016-12-01 日亜化学工業株式会社 発光装置及び光源装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016201408A (ja) * 2015-04-08 2016-12-01 日亜化学工業株式会社 発光装置及び光源装置

Also Published As

Publication number Publication date
JPH0421355B2 (ja) 1992-04-09

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