JPS6195124U - - Google Patents
Info
- Publication number
- JPS6195124U JPS6195124U JP17927484U JP17927484U JPS6195124U JP S6195124 U JPS6195124 U JP S6195124U JP 17927484 U JP17927484 U JP 17927484U JP 17927484 U JP17927484 U JP 17927484U JP S6195124 U JPS6195124 U JP S6195124U
- Authority
- JP
- Japan
- Prior art keywords
- counter
- memory
- receiver
- automatic
- pll
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000006870 function Effects 0.000 claims 2
- 230000010355 oscillation Effects 0.000 claims 1
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Circuits Of Receivers In General (AREA)
Description
第1図は本考案の一実施例よりなる受信機のブ
ロツク図、第2図は第1図のa〜d部の信号のス
タート・リセツトを示すタイミングチヤート、第
3図は第1図のa〜l部の信号のカウント・アツ
プを示すタイミングチヤート、および第4図は従
来の受信機のブロツク図である。
8…PLL、9…レベル検出回路、10…発振
器、12…バイナリカウンタ、13…カウンタ、
14…メモリ、18…カウンタ、19…ドライバ
、20…表示器。
FIG. 1 is a block diagram of a receiver according to an embodiment of the present invention, FIG. 2 is a timing chart showing the start and reset of signals in parts a to d of FIG. 1, and FIG. 3 is a FIG. 4 is a timing chart showing the count up of the signals in the .about.l section, and a block diagram of a conventional receiver. 8... PLL, 9... Level detection circuit, 10... Oscillator, 12... Binary counter, 13... Counter,
14...Memory, 18...Counter, 19...Driver, 20...Display device.
Claims (1)
で制御し、該PLLの分周比のデータを記憶する
メモリと該メモリをアドレスするカウンタとを有
し、自動プリセツト機能を持つ受信機において、
前記カウンタがオーバーフローしたときに作動す
るカウンタを別途設けるとともに、該カウンタの
データを受けて作動する表示器を設けることによ
り、受信バンドを一巡して自動プリセツト用に用
意されている前記メモリのエリアの数以上の放送
局が受信されたとき、該メモリにプリセツトされ
なかつた放送局の数を前記表示器に表示するよう
にしたことを特徴とする受信機。 The local oscillation frequency is changed to a phase lock loop (PLL).
In a receiver having an automatic preset function, the receiver has a memory for storing frequency division ratio data of the PLL and a counter for addressing the memory, and has an automatic preset function.
By separately providing a counter that operates when the counter overflows, and by providing a display that operates in response to data from the counter, the area of the memory prepared for automatic presetting can be read by going around the reception band. 1. A receiver according to claim 1, wherein when more than one broadcast station is received, the number of broadcast stations that have not been preset in the memory is displayed on the display.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984179274U JPH0445294Y2 (en) | 1984-11-28 | 1984-11-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984179274U JPH0445294Y2 (en) | 1984-11-28 | 1984-11-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6195124U true JPS6195124U (en) | 1986-06-19 |
JPH0445294Y2 JPH0445294Y2 (en) | 1992-10-26 |
Family
ID=30736832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984179274U Expired JPH0445294Y2 (en) | 1984-11-28 | 1984-11-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0445294Y2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5816729U (en) * | 1981-07-24 | 1983-02-02 | シャープ株式会社 | automatic paper feeder |
JPS58169723U (en) * | 1982-05-01 | 1983-11-12 | アルパイン株式会社 | radio receiver |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5816729B2 (en) * | 1978-12-12 | 1983-04-01 | 富士通株式会社 | Method for forming marks for measuring dimensional behavior of prepreg |
-
1984
- 1984-11-28 JP JP1984179274U patent/JPH0445294Y2/ja not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5816729U (en) * | 1981-07-24 | 1983-02-02 | シャープ株式会社 | automatic paper feeder |
JPS58169723U (en) * | 1982-05-01 | 1983-11-12 | アルパイン株式会社 | radio receiver |
Also Published As
Publication number | Publication date |
---|---|
JPH0445294Y2 (en) | 1992-10-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6195124U (en) | ||
JPS5854143U (en) | circular display | |
JPS5936636U (en) | synthesizer receiver | |
JPH01133829U (en) | ||
JPS624953Y2 (en) | ||
JPS58147331U (en) | automatic scanning receiver | |
JPH02100342U (en) | ||
JPS60172446U (en) | Receiving machine | |
JPS6364120U (en) | ||
JPS60150837U (en) | radio receiver | |
JPS5871242U (en) | Reception frequency display circuit | |
JPS6364121U (en) | ||
JPH02143837U (en) | ||
JPH0255736U (en) | ||
JPS58169723U (en) | radio receiver | |
JPS5923692U (en) | Electronic clock with radio receiver | |
JPS6066136U (en) | receiver with clock | |
JPH0334337U (en) | ||
JPS6364122U (en) | ||
JPS5830355U (en) | FM receiver | |
JPH02133019U (en) | ||
JPS62146335U (en) | ||
JPS5890745U (en) | FM receiver | |
JPS5868758U (en) | fm radio receiver | |
JPH044428U (en) |