JPH0255736U - - Google Patents

Info

Publication number
JPH0255736U
JPH0255736U JP13579288U JP13579288U JPH0255736U JP H0255736 U JPH0255736 U JP H0255736U JP 13579288 U JP13579288 U JP 13579288U JP 13579288 U JP13579288 U JP 13579288U JP H0255736 U JPH0255736 U JP H0255736U
Authority
JP
Japan
Prior art keywords
sweep
sweeping
display
predetermined period
received during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13579288U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13579288U priority Critical patent/JPH0255736U/ja
Publication of JPH0255736U publication Critical patent/JPH0255736U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案のラジオ受信機のブロツク図
、第2図は、同じく表示器の正面図、第3図のA
〜Cは、同じく制御回路の要部のプログラムのフ
ローチヤートである。 9……局部発振回路、10……プログラマブル
分周器、13……表示器、15……プリセツト用
メモリ、16……制御回路。
Figure 1 is a block diagram of the radio receiver of the present invention, Figure 2 is a front view of the display unit, and Figure 3 is a block diagram of the radio receiver of the present invention.
-C are flowcharts of programs for the main parts of the control circuit. 9...Local oscillation circuit, 10...Programmable frequency divider, 13...Display device, 15...Memory for preset, 16...Control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 局部発振回路をPLL回路で構成したものにお
いて、プリセツト用メモリと、表示器と、自動掃
引を行ない、掃引中に受信した場合、所定時間一
時的に掃引を停止し受信状態とする第1手段と、
自動掃引を行ない、掃引中に受信した場合、所定
時間一時的に掃引を停止し、受信状態にすると共
にその受信局の周波数情報を前記プリセツト用メ
モリにストアする第2手段と、前記第1手段と第
2手段の一方を選択する選択手段と、前記第1手
段と第2手段の選択に応じて前記表示器の表示状
態を異ならせる表示制御手段とからなることを特
徴とするラジオ受信機。
The local oscillation circuit is configured with a PLL circuit, and includes a preset memory, a display, and a first means for performing automatic sweeping and temporarily stopping the sweeping for a predetermined period of time to enter a receiving state when reception is received during sweeping. ,
a second means for performing an automatic sweep and, when a signal is received during the sweep, temporarily stops the sweep for a predetermined period of time, sets the receiving station to a receiving state, and stores frequency information of the receiving station in the preset memory; and the first means. and a selection means for selecting one of the first means and the second means, and a display control means for changing the display state of the display according to the selection of the first means and the second means.
JP13579288U 1988-10-18 1988-10-18 Pending JPH0255736U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13579288U JPH0255736U (en) 1988-10-18 1988-10-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13579288U JPH0255736U (en) 1988-10-18 1988-10-18

Publications (1)

Publication Number Publication Date
JPH0255736U true JPH0255736U (en) 1990-04-23

Family

ID=31395707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13579288U Pending JPH0255736U (en) 1988-10-18 1988-10-18

Country Status (1)

Country Link
JP (1) JPH0255736U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6160532B2 (en) * 1977-06-08 1986-12-22 Tokyo Shibaura Electric Co

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6160532B2 (en) * 1977-06-08 1986-12-22 Tokyo Shibaura Electric Co

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