JPS6418835U - - Google Patents
Info
- Publication number
- JPS6418835U JPS6418835U JP14020087U JP14020087U JPS6418835U JP S6418835 U JPS6418835 U JP S6418835U JP 14020087 U JP14020087 U JP 14020087U JP 14020087 U JP14020087 U JP 14020087U JP S6418835 U JPS6418835 U JP S6418835U
- Authority
- JP
- Japan
- Prior art keywords
- preset
- set time
- operated
- switch
- frequency information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims description 2
- 238000010408 sweeping Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000011017 operating method Methods 0.000 description 2
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Description
第１図は、本考案実施例のプリセツト受信機の
回路ブロツク図、第２図は、第１図のプリセツト
受信機の主要部分の動作手順を示すフローチヤー
ト、第３図は、第１図のプリセツト受信器の主要
部分の他の実施例を示すフローチヤート、第４図
は、他の実施例のプリセツト受信機の回路ブロツ
ク図、第５図は、第４図のプリセツト受信機の主
要部分の動作手順を示すフローチヤート、第６図
ａ，ｂは、第４図のプリセツト受信機の主要部分
の他の実施例を示すフローチヤートである。
５…局部発振回路、６…プログラマブル分周器
、７…制御手段、８…プリセツト用メモリ、Ｐ１
〜Ｐ４…プリセツトスイツチ。
FIG. 1 is a circuit block diagram of a preset receiver according to an embodiment of the present invention, FIG. 2 is a flow chart showing the operating procedure of the main parts of the preset receiver of FIG. 1, and FIG. A flowchart showing another embodiment of the main parts of the preset receiver, FIG. 4 is a circuit block diagram of the preset receiver of another embodiment, and FIG. 5 shows the main parts of the preset receiver of FIG. 4. FIGS. 6a and 6b are flowcharts illustrating the operating procedure of another embodiment of the main parts of the preset receiver of FIG. 4. 5...Local oscillation circuit, 6...Programmable frequency divider, 7...Control means, 8...Memory for preset, P1
~ P4 ...Preset switch.
Claims (1)
該ＰＬＬ回路を構成するプログラマブル分周器の
分周比を変更して選局を行なわせる掃引手段を具
備した制御手段と、複数のプリセツトスイツチと
、該プリセツトスイツチにより放送局の受信周波
数情報を記憶し、且つ読み出される複数のメモリ
ユニツトからなるプリセツト用メモリとを備えた
プリセツト受信機に於いて、前記制御手段に、前
記プリセツトスイツチの操作時作動されるタイマ
ー手段と、該タイマー手段の第１設定時間及び第
２設定時間内に前記プリセツトスイツチが操作さ
れているかどうかを判定する判定手段とを設け、
前記プリセツトスイツチの操作で該判定手段によ
り第１設定時間内であると判定されると、操作さ
れたプリセツトスイツチに対応する前記プリセツ
ト用メモリのメモリユニツトから記憶された受信
周波数情報を読み出すと共に、第１設定時間以上
で且つ第２設定時間内であると判定されると、操
作されたプリセツトスイツチに対応する前記プリ
セツト用メモリのメモリユニツトに受信周波数情
報を記憶させ、更に第２設定時間以上であると判
定されると、前記掃引手段を作動して前記プリセ
ツト用メモリに自動で前記放送局の受信周波数情
報を記憶させるよう構成したことを特徴とするプ
リセツト受信機。 (2) 前記制御手段に、前記タイマー手段の第１
設定時間及び第２設定時間の経過状況を報知する
報知手段を設けたことを特徴とする実用新案登録
請求の範囲第１項記載のプリセツト受信機。[Claims for Utility Model Registration] (1) A local oscillation circuit composed of a PLL circuit,
control means equipped with a sweep means for changing the frequency division ratio of the programmable frequency divider constituting the PLL circuit to perform channel selection; a plurality of preset switches; In the preset receiver, the control means includes a timer means activated when the preset switch is operated, and a timer means for the timer means, which is activated when the preset switch is operated. determining means for determining whether the preset switch is operated within a first set time and a second set time,
When the determining means determines that the first set time has elapsed due to the operation of the preset switch, the received frequency information stored in the memory unit of the preset memory corresponding to the operated preset switch is read out, and If it is determined that the time is longer than the first set time and within the second set time, the received frequency information is stored in the memory unit of the preset memory corresponding to the operated preset switch, and the reception frequency information is stored in the memory unit of the preset memory corresponding to the operated preset switch. A preset receiver characterized in that, when it is determined that the above is the case, the sweeping means is activated to automatically store received frequency information of the broadcasting station in the preset memory. (2) The control means includes a first of the timer means.
The preset receiver according to claim 1, further comprising a notification means for notifying the elapsed status of the set time and the second set time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987140200U JPH0611650Y2 (en) | 1987-02-19 | 1987-09-14 | Preset receiver |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2303987 | 1987-02-19 | ||
| JP62-23039 | 1987-02-19 | ||
| JP1987140200U JPH0611650Y2 (en) | 1987-02-19 | 1987-09-14 | Preset receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6418835U true JPS6418835U (en) | 1989-01-30 |
| JPH0611650Y2 JPH0611650Y2 (en) | 1994-03-23 |
Family
ID=31717495
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987140200U Expired - Lifetime JPH0611650Y2 (en) | 1987-02-19 | 1987-09-14 | Preset receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0611650Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5550728A (en) * | 1978-10-06 | 1980-04-12 | Hitachi Ltd | Electronic tuning receiver of preset type |
| JPS5750366A (en) * | 1980-07-16 | 1982-03-24 | Gefitec Sa | Magnetic disc cartridge holding device |
| JPS60254910A (en) * | 1984-05-31 | 1985-12-16 | Nec Ic Microcomput Syst Ltd | Automatic storage system for reception frequency |
-
1987
- 1987-09-14 JP JP1987140200U patent/JPH0611650Y2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5550728A (en) * | 1978-10-06 | 1980-04-12 | Hitachi Ltd | Electronic tuning receiver of preset type |
| JPS5750366A (en) * | 1980-07-16 | 1982-03-24 | Gefitec Sa | Magnetic disc cartridge holding device |
| JPS60254910A (en) * | 1984-05-31 | 1985-12-16 | Nec Ic Microcomput Syst Ltd | Automatic storage system for reception frequency |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0611650Y2 (en) | 1994-03-23 |
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