JPH0439735U - - Google Patents

Info

Publication number
JPH0439735U
JPH0439735U JP8156990U JP8156990U JPH0439735U JP H0439735 U JPH0439735 U JP H0439735U JP 8156990 U JP8156990 U JP 8156990U JP 8156990 U JP8156990 U JP 8156990U JP H0439735 U JPH0439735 U JP H0439735U
Authority
JP
Japan
Prior art keywords
frequency
predetermined
receiving circuit
automatic sweeping
reception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8156990U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8156990U priority Critical patent/JPH0439735U/ja
Publication of JPH0439735U publication Critical patent/JPH0439735U/ja
Pending legal-status Critical Current

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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案のラジオ受信機のブロツク図
、第2図は、同じく振幅検波回路の動作説明図、
第3図は、同じく振幅検波回路の出力信号の検出
レベルの説明図、第4図は、同じく制御回路に書
き込まれた要部のプログラムのフローチヤートで
ある。 6……局部発振回路、9……自動掃引キー、1
0……制御回路。
FIG. 1 is a block diagram of the radio receiver of the present invention, and FIG. 2 is an explanatory diagram of the operation of the amplitude detection circuit.
FIG. 3 is an explanatory diagram of the detection level of the output signal of the amplitude detection circuit, and FIG. 4 is a flowchart of the main part of the program written in the control circuit. 6...Local oscillation circuit, 9...Auto sweep key, 1
0...Control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 局部発振回路をPLL回路で構成した受信回路
と、該受信回路に局間周波数毎の周波数情報を与
えて自動掃引を行ない、受信レベルが所定値以上
且つ中間周波信号が所定の周波数である時に自動
掃引を停止する制御手段とを有するものにおいて
、前記制御手段は、受信レベルが所定値以上で、
中間周波信号が所定の周波数でない場合、少なく
ともその受信周波数の前後に所定周波数分の帯域
について局間周波数より小さい値毎に前記受信回
路に周波数情報を与え自動掃引を行なうことを特
徴とするラジオ受信機。
A receiving circuit whose local oscillator circuit is a PLL circuit, and frequency information for each inter-office frequency is given to the receiving circuit to perform automatic sweeping, and automatic sweeping is performed when the reception level is above a predetermined value and the intermediate frequency signal is at a predetermined frequency. and control means for stopping the sweep, wherein the control means controls when the reception level is equal to or higher than a predetermined value;
If the intermediate frequency signal does not have a predetermined frequency, radio reception is characterized in that frequency information is given to the receiving circuit for each value smaller than the inter-office frequency for at least a predetermined frequency band before and after the reception frequency, and automatic sweeping is performed. Machine.
JP8156990U 1990-07-31 1990-07-31 Pending JPH0439735U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8156990U JPH0439735U (en) 1990-07-31 1990-07-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8156990U JPH0439735U (en) 1990-07-31 1990-07-31

Publications (1)

Publication Number Publication Date
JPH0439735U true JPH0439735U (en) 1992-04-03

Family

ID=31627633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8156990U Pending JPH0439735U (en) 1990-07-31 1990-07-31

Country Status (1)

Country Link
JP (1) JPH0439735U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607221A (en) * 1983-06-27 1985-01-16 Toshiba Corp Digital tuning system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607221A (en) * 1983-06-27 1985-01-16 Toshiba Corp Digital tuning system

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