JPS5923692U - Electronic clock with radio receiver - Google Patents

Electronic clock with radio receiver

Info

Publication number
JPS5923692U
JPS5923692U JP11842182U JP11842182U JPS5923692U JP S5923692 U JPS5923692 U JP S5923692U JP 11842182 U JP11842182 U JP 11842182U JP 11842182 U JP11842182 U JP 11842182U JP S5923692 U JPS5923692 U JP S5923692U
Authority
JP
Japan
Prior art keywords
radio receiver
layer
electronic clock
display panel
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11842182U
Other languages
Japanese (ja)
Inventor
功 荒井
Original Assignee
セイコーインスツルメンツ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by セイコーインスツルメンツ株式会社 filed Critical セイコーインスツルメンツ株式会社
Priority to JP11842182U priority Critical patent/JPS5923692U/en
Publication of JPS5923692U publication Critical patent/JPS5923692U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示した回路ブロック図、第
2図は本考案に係る表示形態の一実施例を示した電子時
計の外観図、第3図は本考案に係る表示パネルの一実施
例を示した平面図である。 1・・・・・・アンテナ、2・・・・・・高周波増幅回
路、3・・・・・・局発回路、4・・・・・・周波数変
換回路、5・・・・・・中間周波増幅回路、6・・・・
・・検波回路、7・・・・・・低周波増幅回路、8・・
・・・・スピーカ、9・・・・・・AGC回路、10・
・・・・・A/D変換回路、11・・・・・・デコーダ
回路、12・・・・・・データセレクタ回路、13・・
・・・・時計回路、14・・・・・・ドライバ回路、1
5・・・・・・表示回路、16・・・・・・時刻表示パ
ネル、17・・・・・・レベル表示パネル、18・・・
・・・選局ダイアル、19・・・・・・セグメントであ
る。
Fig. 1 is a circuit block diagram showing an embodiment of the present invention, Fig. 2 is an external view of an electronic watch showing an embodiment of the display form according to the present invention, and Fig. 3 is a display panel according to the present invention. FIG. 2 is a plan view showing one embodiment of the invention. 1...Antenna, 2...High frequency amplification circuit, 3...Local oscillator circuit, 4...Frequency conversion circuit, 5...Intermediate Frequency amplification circuit, 6...
...Detection circuit, 7...Low frequency amplification circuit, 8...
... Speaker, 9 ... AGC circuit, 10.
... A/D conversion circuit, 11 ... Decoder circuit, 12 ... Data selector circuit, 13 ...
... Clock circuit, 14 ... Driver circuit, 1
5... Display circuit, 16... Time display panel, 17... Level display panel, 18...
. . . Tuning dial, 19 . . . Segment.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)少なくともラジオ受信機を内蔵した電子時計にお
いて、時計部の表示装置で前記ラジオ受信・ 機のAG
C電圧を指示するように構成したことを特徴とするラジ
オ受信機付電子時計。
(1) In an electronic watch with at least a built-in radio receiver, the AG of the radio receiver is displayed on the display device of the watch section.
An electronic clock with a radio receiver, characterized in that it is configured to indicate C voltage.
(2)2層の表示パネルを用い、前記2層の表示パネル
の一層で時刻表示を、他の一層でAGC電圧の指示表示
をしたことを特徴とする実用新案登録請求の範囲第1項
記載のラジオ受信機付電子時計。
(2) Utility model registration claim 1, characterized in that a two-layer display panel is used, one layer of the two-layer display panel displays the time, and the other layer displays the AGC voltage instruction. Electronic clock with radio receiver.
(3)表示パネルに7個のセグメントを設け、該7個の
セグメントを七曜表示とAGC電圧レベル指示の表示と
に兼用したことを特徴とする実用新案登録請求の範囲第
1項記載のラジオ受信機7 付置子時計。
(3) The radio reception according to claim 1 of the utility model registration claim, characterized in that the display panel is provided with seven segments, and the seven segments are used both to display the Seven Days of the Month and to display the AGC voltage level instruction. Machine 7 A child clock.
JP11842182U 1982-08-04 1982-08-04 Electronic clock with radio receiver Pending JPS5923692U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11842182U JPS5923692U (en) 1982-08-04 1982-08-04 Electronic clock with radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11842182U JPS5923692U (en) 1982-08-04 1982-08-04 Electronic clock with radio receiver

Publications (1)

Publication Number Publication Date
JPS5923692U true JPS5923692U (en) 1984-02-14

Family

ID=30272193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11842182U Pending JPS5923692U (en) 1982-08-04 1982-08-04 Electronic clock with radio receiver

Country Status (1)

Country Link
JP (1) JPS5923692U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63180506U (en) * 1987-05-14 1988-11-22

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63180506U (en) * 1987-05-14 1988-11-22

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