JPS6066136U - receiver with clock - Google Patents
receiver with clockInfo
- Publication number
- JPS6066136U JPS6066136U JP15948483U JP15948483U JPS6066136U JP S6066136 U JPS6066136 U JP S6066136U JP 15948483 U JP15948483 U JP 15948483U JP 15948483 U JP15948483 U JP 15948483U JP S6066136 U JPS6066136 U JP S6066136U
- Authority
- JP
- Japan
- Prior art keywords
- time
- receiver
- clock
- display
- displaying
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Clocks (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案による時計付受信機の回路図、第2図は
本考案の要部を示す制御手段の回路図、第3図7.イ、
つは本考案の動作を説明するのに供した図、第4図は本
考案の第2実施例を示す制御手段の回路図、第5図7.
イ、つは第4図に示す第2実施例の動作を説明するのに
供した図である。
2・・・FMチューナー回路、3・・・AMチューナー
゛回路、4,4′・・・受信バンド選択スイッチ、7
・・・コントローラ回路、8・・・ラジオ電源スィッチ
、9・・・表示器、10−・・制御部、95・・・文字
表示部、96・・・セグメント表示部。′
1]
、95 (96
95’961 is a circuit diagram of a receiver with a clock according to the present invention, FIG. 2 is a circuit diagram of a control means showing the main parts of the present invention, and FIG. 3 is a circuit diagram of a receiver with a clock according to the present invention. stomach,
1 is a diagram used to explain the operation of the present invention, FIG. 4 is a circuit diagram of a control means showing a second embodiment of the present invention, and FIG.
FIG. 4 is a diagram used to explain the operation of the second embodiment shown in FIG. 4. 2...FM tuner circuit, 3...AM tuner circuit, 4, 4'...reception band selection switch, 7
. . . Controller circuit, 8 . . . Radio power switch, 9 . ' 1] , 95 (96 95'96
Claims (1)
、且つ通常は時刻表示を行ないラジオ操作で所定時間周
波数表示をした後、再び時刻表示に自動復帰する時刻表
示優先機能を具備した時計付受信機に於いて、時刻表示
時ラジオの受信バンドの表示を行う手段を具備したこと
を特徴とする時計付受信機。 ′A clock equipped with a time display priority function that switches between time and frequency display on a single display, and that normally displays the time and then displays the frequency for a predetermined period of time by radio operation, and then automatically returns to the time display. A receiver with a clock, characterized in that the receiver is equipped with means for displaying a radio reception band when displaying the time. ′
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15948483U JPS6066136U (en) | 1983-10-14 | 1983-10-14 | receiver with clock |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15948483U JPS6066136U (en) | 1983-10-14 | 1983-10-14 | receiver with clock |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6066136U true JPS6066136U (en) | 1985-05-10 |
Family
ID=30351064
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15948483U Pending JPS6066136U (en) | 1983-10-14 | 1983-10-14 | receiver with clock |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6066136U (en) |
-
1983
- 1983-10-14 JP JP15948483U patent/JPS6066136U/en active Pending
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