JPS6189952U - - Google Patents
Info
- Publication number
- JPS6189952U JPS6189952U JP17217484U JP17217484U JPS6189952U JP S6189952 U JPS6189952 U JP S6189952U JP 17217484 U JP17217484 U JP 17217484U JP 17217484 U JP17217484 U JP 17217484U JP S6189952 U JPS6189952 U JP S6189952U
- Authority
- JP
- Japan
- Prior art keywords
- count pulse
- circuit
- output
- count
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 1
Landscapes
- Microcomputers (AREA)
Description
第１図は本考案によるイベントエツジ切換回路
を内蔵したマイクロコンピユータの一実施例の回
路図、第２図は外付けイベントパルスエツジ切換
回路を備えたマイクロコンピユータの従来例の回
路図である。
１……イベントパルスエツジ切換回路、１ａ〜
１ｃ……インバータ回路、１ｄ，１ｅ……トラン
スフア回路、１ｆ……イベント信号、１ｇ，１ｈ
……システム・クロツク分周パルス、３……カウ
ントパルス選択回路、ＰＥ……イベントパルス入
力端子、ＣＰ……カウントパルス、ＣＳ……イベ
ントパルス反転制御信号。
FIG. 1 is a circuit diagram of an embodiment of a microcomputer incorporating an event edge switching circuit according to the present invention, and FIG. 2 is a circuit diagram of a conventional example of a microcomputer equipped with an external event pulse edge switching circuit. 1...Event pulse edge switching circuit, 1a~
1c...Inverter circuit, 1d, 1e...Transfer circuit, 1f...Event signal, 1g, 1h
...System clock frequency division pulse, 3...Count pulse selection circuit, PE...Event pulse input terminal, CP...Count pulse, CS...Event pulse inversion control signal.
Claims (1)
において、カウントパルスを入力するカウントパ
ルス入力端子と、該カウントパルスを反転する反
転回路と、該反転回路の出力と前記カウントパル
スのいずれか一方を選択して前記カウンタ回路に
出力する選択回路を内蔵したことを特徴とするマ
イクロコンピユータ。 A microcomputer with a built-in counter circuit includes a count pulse input terminal for inputting count pulses, an inversion circuit for inverting the count pulse, and an output for selecting either the output of the inversion circuit or the count pulse to output the count pulse to the counter circuit. A microcomputer characterized by having a built-in selection circuit for outputting to.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984172174U JPH063471Y2 (en) | 1984-11-13 | 1984-11-13 | Micro computer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984172174U JPH063471Y2 (en) | 1984-11-13 | 1984-11-13 | Micro computer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6189952U true JPS6189952U (en) | 1986-06-11 |
| JPH063471Y2 JPH063471Y2 (en) | 1994-01-26 |
Family
ID=30729849
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984172174U Expired - Lifetime JPH063471Y2 (en) | 1984-11-13 | 1984-11-13 | Micro computer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH063471Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5810727A (en) * | 1981-07-14 | 1983-01-21 | Konishiroku Photo Ind Co Ltd | Pulse counting method for camera |
-
1984
- 1984-11-13 JP JP1984172174U patent/JPH063471Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5810727A (en) * | 1981-07-14 | 1983-01-21 | Konishiroku Photo Ind Co Ltd | Pulse counting method for camera |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH063471Y2 (en) | 1994-01-26 |