JPS6174140U

JPS6174140U -

Info

Publication number: JPS6174140U
Application number: JP15761584U
Authority: JP
Priority date: 1984-10-17
Filing date: 1984-10-17
Publication date: 1986-05-20

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例を示すブロツク図
、第２図は第１図の論理回路の構成を示すブロツ
ク図、第３図は従来のマイクロプロセツサの構成
を示すブロツク図、第４図は従来のインタプリー
タ方式におけるプログラム制御の流れを示す流れ
図、第５図は従来のコンパイラ方式におけるプロ
グラム制御の流れを示す流れ図、第６図は従来の
トランスレータ方式におけるプログラム制御の流
れを示す流れ図である。図において１はマイクロプロセツサ、２，１１
はそれぞれデータバス、３，１２はそれぞれ記憶
装置、１０は論理回路、１３は命令入力回路、１
４は命令変換回路、１５は命令出力回路である。
尚、各図中同一符号は同一又は相当部分を示す。 FIG. 1 is a block diagram showing an embodiment of this invention, FIG. 2 is a block diagram showing the configuration of the logic circuit in FIG. 1, FIG. 3 is a block diagram showing the configuration of a conventional microprocessor, and FIG. Figure 5 is a flowchart showing the flow of program control in the conventional interpreter system, Figure 5 is a flowchart showing the flow of program control in the conventional compiler system, and Figure 6 is a flowchart showing the flow of program control in the conventional translator system. . In the figure, 1 is a microprocessor, 2, 11
1 is a data bus, 3 and 12 are storage devices, 10 is a logic circuit, 13 is an instruction input circuit, and 1 is a data bus.
4 is an instruction conversion circuit, and 15 is an instruction output circuit.
Note that the same reference numerals in each figure indicate the same or corresponding parts.

補正昭６０．２．１８図面の簡単な説明を次のように補正する。明細書第８頁第１９行目「インタプリータ」と
あるを「インタプリタ」と訂正する。Amendment February 18, 1980 The brief description of the drawing is amended as follows. On page 8, line 19 of the specification, the word "interpreter" is corrected to "interpreter."

Claims

[Scope of utility model registration request]

An instruction input circuit into which command statements written in a high-level language are input one after another from a program created using a high-level language for data processing by a microprocessor; An instruction conversion circuit that converts the instructions into a language that is easier to solve by a setter, and an instruction that outputs the instructions converted by the instruction conversion circuit onto a data bus that commonly connects the microprocessor and its storage device. Logic circuit with output circuit.