JPS6172933U - - Google Patents

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Publication number
JPS6172933U
JPS6172933U JP15744884U JP15744884U JPS6172933U JP S6172933 U JPS6172933 U JP S6172933U JP 15744884 U JP15744884 U JP 15744884U JP 15744884 U JP15744884 U JP 15744884U JP S6172933 U JPS6172933 U JP S6172933U
Authority
JP
Japan
Prior art keywords
transistor
output terminal
signal
terminal
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15744884U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15744884U priority Critical patent/JPS6172933U/ja
Publication of JPS6172933U publication Critical patent/JPS6172933U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案回路の一実施例の回路図、第2
図は本考案回路及び従来回路の動作説明用信号波
形図、第3図は従来回路の一例の回路図である。 1…信号入力端子、2,5…FET、3…選択
制御信号入力端子、4…出力端子、6,7…イン
バータ、C,C…浮遊容量。
Figure 1 is a circuit diagram of an embodiment of the circuit of the present invention, Figure 2 is a circuit diagram of an embodiment of the circuit of the present invention;
The figures are signal waveform diagrams for explaining the operation of the circuit of the present invention and the conventional circuit, and FIG. 3 is a circuit diagram of an example of the conventional circuit. 1... Signal input terminal, 2, 5... FET, 3... Selection control signal input terminal, 4... Output terminal, 6, 7... Inverter, C 2 , C 5 ... Stray capacitance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 選択制御信号にてスイツチング制御される第1
のトランジスタにてその入力端子に入来する入力
信号を選択してその出力端子より取出す信号選択
回路において、上記第1のトランジスタと同一特
性の第2のトランジスタの出力端子を上記第1の
トランジスタの上記出力端子に共通に接続し、該
第2のトランジスタの制御端子に上記選択制御信
号と同レベルで逆極性の選択制御信号の入力端子
を接続してなる信号選択回路。
The first switch is controlled by the selection control signal.
In a signal selection circuit in which a transistor selects an input signal entering its input terminal and extracts it from its output terminal, the output terminal of a second transistor having the same characteristics as that of the first transistor is connected to the output terminal of the first transistor. A signal selection circuit, which is commonly connected to the output terminal, and has an input terminal for a selection control signal having the same level and opposite polarity as the selection control signal and connected to the control terminal of the second transistor.
JP15744884U 1984-10-18 1984-10-18 Pending JPS6172933U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15744884U JPS6172933U (en) 1984-10-18 1984-10-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15744884U JPS6172933U (en) 1984-10-18 1984-10-18

Publications (1)

Publication Number Publication Date
JPS6172933U true JPS6172933U (en) 1986-05-17

Family

ID=30715441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15744884U Pending JPS6172933U (en) 1984-10-18 1984-10-18

Country Status (1)

Country Link
JP (1) JPS6172933U (en)

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