JPS61185145U - - Google Patents
Info
- Publication number
- JPS61185145U JPS61185145U JP6804885U JP6804885U JPS61185145U JP S61185145 U JPS61185145 U JP S61185145U JP 6804885 U JP6804885 U JP 6804885U JP 6804885 U JP6804885 U JP 6804885U JP S61185145 U JPS61185145 U JP S61185145U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- inverter
- output
- input terminal
- open collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Description
第１図は本考案によるテスト信号切換回路の一
実施例を示す回路図、第２図は従来のテスト信号
切換回路を示す回路図である。
１４……テスト信号切換回路、１５，１８……
抵抗、１６……インバータ、１７，１９……ゲー
ト。
FIG. 1 is a circuit diagram showing an embodiment of a test signal switching circuit according to the present invention, and FIG. 2 is a circuit diagram showing a conventional test signal switching circuit. 14...Test signal switching circuit, 15, 18...
Resistor, 16... Inverter, 17, 19... Gate.
Claims (1)
て構成される出力バツフアを有する回路から供給
される信号を反転するインバータと、このインバ
ータの入力側をプルアツプする抵抗と、前記イン
バータの出力側と出力端との間に接続された出力
段がオープンコレクタトランジスタによつて構成
される第１のゲートと、この第１のゲートに於け
る出力側をプルアツプする抵抗と、テスト制御信
号の入力端と前記インバータの入力側との間に接
続された出力段がオープンコレクタトランジスタ
によつて構成され、かつ前記第１のゲートと同一
の極性を有する第２のゲートと、前記第１のゲー
トの出力側に接続されたテスト信号の入力端とを
備えたテスト信号切換回路。 An inverter that inverts a signal supplied from a circuit having an output buffer whose output stage is composed of open collector transistors, a resistor that pulls up the input side of this inverter, and between the output side and output end of the inverter. a first gate whose output stage is connected to an open collector transistor; a resistor that pulls up the output side of the first gate; and an input terminal for a test control signal and an input terminal of the inverter. a second gate, the output stage of which is connected between an open collector transistor and which has the same polarity as the first gate; and a test connected to the output side of the first gate. A test signal switching circuit equipped with a signal input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6804885U JPH0325228Y2 (en) | 1985-05-10 | 1985-05-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6804885U JPH0325228Y2 (en) | 1985-05-10 | 1985-05-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61185145U true JPS61185145U (en) | 1986-11-18 |
| JPH0325228Y2 JPH0325228Y2 (en) | 1991-05-31 |
Family
ID=30602438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6804885U Expired JPH0325228Y2 (en) | 1985-05-10 | 1985-05-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0325228Y2 (en) |
-
1985
- 1985-05-10 JP JP6804885U patent/JPH0325228Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0325228Y2 (en) | 1991-05-31 |