JPS6162440U - - Google Patents
Info
- Publication number
- JPS6162440U JPS6162440U JP14695584U JP14695584U JPS6162440U JP S6162440 U JPS6162440 U JP S6162440U JP 14695584 U JP14695584 U JP 14695584U JP 14695584 U JP14695584 U JP 14695584U JP S6162440 U JPS6162440 U JP S6162440U
- Authority
- JP
- Japan
- Prior art keywords
- converters
- control signals
- converter
- synchronization
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案の１実施例を示す構成図、第２
図は制御信号を説明するグラフである。
１…入力端、２…増幅器、３，４…Ａ／Ｄ変換
器、５…クロツク発生部、６…非反転増幅器、７
…反転増幅器、８，９…出力バス、１０，１１…
メモリ、１２，１３…クロツク入力端。
Figure 1 is a configuration diagram showing one embodiment of the present invention;
The figure is a graph explaining the control signal. DESCRIPTION OF SYMBOLS 1...Input end, 2...Amplifier, 3, 4...A/D converter, 5...Clock generator, 6...Non-inverting amplifier, 7
...Inverting amplifier, 8, 9... Output bus, 10, 11...
Memory, 12, 13...clock input terminal.
Claims (1)
号発生部と、前記制御信号の各々に同期して作動
する複数個のＡ／Ｄ変換器を有し、各々のＡ／Ｄ
変換器の入力信号端は１個の共通の入力端に接続
され、各々のＡ／Ｄ変換器から出力を得るＡ／Ｄ
変換装置。 It has a control signal generator that generates a plurality of control signals with different phases, and a plurality of A/D converters that operate in synchronization with each of the control signals, and each A/D
The input signal terminals of the converters are connected to one common input terminal, and the A/D converters obtain outputs from each A/D converter.
conversion device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14695584U JPS6162440U (en) | 1984-09-27 | 1984-09-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14695584U JPS6162440U (en) | 1984-09-27 | 1984-09-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6162440U true JPS6162440U (en) | 1986-04-26 |
Family
ID=30705194
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14695584U Pending JPS6162440U (en) | 1984-09-27 | 1984-09-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6162440U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5691530A (en) * | 1979-12-25 | 1981-07-24 | Fujitsu Ltd | High-speed high-precision a/d converter |
| JPS5767327A (en) * | 1980-10-15 | 1982-04-23 | Nissin Electric Co Ltd | Error testing device |
-
1984
- 1984-09-27 JP JP14695584U patent/JPS6162440U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5691530A (en) * | 1979-12-25 | 1981-07-24 | Fujitsu Ltd | High-speed high-precision a/d converter |
| JPS5767327A (en) * | 1980-10-15 | 1982-04-23 | Nissin Electric Co Ltd | Error testing device |
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