JPS6161288A - 磁気バブルメモリ装置 - Google Patents
磁気バブルメモリ装置Info
- Publication number
- JPS6161288A JPS6161288A JP59181905A JP18190584A JPS6161288A JP S6161288 A JPS6161288 A JP S6161288A JP 59181905 A JP59181905 A JP 59181905A JP 18190584 A JP18190584 A JP 18190584A JP S6161288 A JPS6161288 A JP S6161288A
- Authority
- JP
- Japan
- Prior art keywords
- loop
- bubble memory
- information
- boot
- defective
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59181905A JPS6161288A (ja) | 1984-08-31 | 1984-08-31 | 磁気バブルメモリ装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59181905A JPS6161288A (ja) | 1984-08-31 | 1984-08-31 | 磁気バブルメモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6161288A true JPS6161288A (ja) | 1986-03-29 |
JPS6367278B2 JPS6367278B2 (enrdf_load_stackoverflow) | 1988-12-23 |
Family
ID=16108936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59181905A Granted JPS6161288A (ja) | 1984-08-31 | 1984-08-31 | 磁気バブルメモリ装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6161288A (enrdf_load_stackoverflow) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54109728A (en) * | 1978-02-17 | 1979-08-28 | Hitachi Ltd | Memory device |
JPS5573983A (en) * | 1978-11-25 | 1980-06-04 | Fujitsu Ltd | Magnetic bubble storage system |
JPS5613580A (en) * | 1979-07-13 | 1981-02-09 | Nec Corp | Magnetic bubble memory unit |
JPS5856281A (ja) * | 1981-09-29 | 1983-04-02 | Fujitsu Ltd | 磁気バブルメモリの不良ル−プ情報の処理方式 |
-
1984
- 1984-08-31 JP JP59181905A patent/JPS6161288A/ja active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54109728A (en) * | 1978-02-17 | 1979-08-28 | Hitachi Ltd | Memory device |
JPS5573983A (en) * | 1978-11-25 | 1980-06-04 | Fujitsu Ltd | Magnetic bubble storage system |
JPS5613580A (en) * | 1979-07-13 | 1981-02-09 | Nec Corp | Magnetic bubble memory unit |
JPS5856281A (ja) * | 1981-09-29 | 1983-04-02 | Fujitsu Ltd | 磁気バブルメモリの不良ル−プ情報の処理方式 |
Also Published As
Publication number | Publication date |
---|---|
JPS6367278B2 (enrdf_load_stackoverflow) | 1988-12-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0274817B1 (en) | Data storage system | |
US4558446A (en) | Memory system | |
US3693159A (en) | Data storage system with means for eliminating defective storage locations | |
US4271519A (en) | Address mark generation and decoding method | |
JPH02278449A (ja) | フオールト・トレラント・メモリ・システム | |
US4453248A (en) | Fault alignment exclusion method to prevent realignment of previously paired memory defects | |
US4797754A (en) | Method for writing servo pattern in magnetic disk unit | |
EP0366757B1 (en) | Memory selftest method and apparatus | |
JPS6161288A (ja) | 磁気バブルメモリ装置 | |
CA1111557A (en) | Fault tolerant bubble memory with redundancy using a stationary register on a single chip | |
US5654835A (en) | Magnetic disk controller capable of avoiding erroneous write operations to ZBR-type magnetic disks | |
US5267097A (en) | Information transfer control system having rotary storage unit which uses a pseudo address mark | |
EP0127350B1 (en) | Magnetic bubble memory device | |
EP0011717B1 (en) | A magnetic bubble domain memory system | |
JP2000322328A (ja) | データ検証方法及びその装置 | |
US4592016A (en) | Magnetic bubble memory device | |
SU896626A1 (ru) | Устройство дл контрол ввода-вывода | |
KR100228799B1 (ko) | 데이타섹터펄스 발생 방법 | |
JPS5841592B2 (ja) | 磁気バブルメモリの試験方法 | |
JPS59119586A (ja) | バブルメモリシステム | |
KR100285425B1 (ko) | 순환중복검사코드 발생회로 | |
SU329578A1 (ru) | Магнитное запоминающее устройство | |
JPS6013360A (ja) | 記憶装置 | |
JPS60220444A (ja) | 交替ビツト制御回路 | |
JPS5816555B2 (ja) | メモリ制御方式 |