JPS6159824A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To prevent damage on the handling of an FET element by forming a pattern for a resist required for isolating an electrode with four sides by whole-surface exposing and developing a resist film applied on the whole surface of the back of a GaAs substrate when the electrode is shaped in a latticed groove formed to the back of the substrate. CONSTITUTION:An FET element 22 is shaped onto a GaAs substrate 21. A scribing metal 23 is patterned onto the substrate 21 to a latticed form, and the scribing metal 23 is removed through etching. A glass plate 25 for protecting the surface is stuck by using wax 26 prior to the formation of a groove to the back of the substrate 21, the thickness of the substrate 21 is shaven, a second resist film is applied and shaped onto the back of the substrate, and the resist film is exposed by employing a glass mask and developed to form a resist film 27. The back of the substrate 21 is photoetched while using the resist film 27 as a mask to shape grooves 28. The resist film 27 is removed, and a conductive metallic film 29 is formed onto the whole surface of the back of the substrate 21. The metallic film 29 is shaped by evaporating Ti first and Au. The metallic film 29 is evaporated, and a resist film 30 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming electrodes of a compound semiconductor device, such as a gallium arsenide (GaAs) semiconductor device.

A GaAs Schottky field effect transistor (GaAs MES FET) is known as a microwave semiconductor device. An electrode is formed on the surface (back surface) of the GaAs MES FET opposite to the element formation surface for the purpose of grounding and heat sinking.

The carrier mobility and saturation drift velocity of GaAs compound semiconductors are significantly higher than those of silicon (Si), etc.
In addition, Schottky field effect transistors are easy to fabricate and manufacture, allowing for gate miniaturization.
Excellent high frequency characteristics can be obtained by As MES FET.

[Conventional technology]

Referring to the cross-sectional view of FIG.
An element 12 is formed on one side of the aAs substrate 11 . To form the electrode, etching grooves are formed in a grid pattern on the back surface of the GaAs substrate 11, and then titanium/gold (T'
i-Au) H'A 13 is formed by, for example, vacuum MM, and then a photoresist (hereinafter simply referred to as resist) is applied to the entire back surface, and the resulting film is patterned to form a resist JIL' 14, and then electro-fw plating is performed. ^U electrode 15 was formed with a thickness of 30 μm, the resist film 14 was removed, and finally a GaAs-based (anti-11
The portion shown by the dotted line in the figure is cut to form the device shown in FIG. 4 having a 0.3 mm opening, for example.

The above-mentioned process is performed by resist+111 as shown in FIG.
4 is formed on a substrate, the plating is formed at a ratio of 1:1 in the horizontal (side) direction and in the vertical direction.

Note that in FIG. 4 and subsequent figures, the same parts as those shown in FIG. 3 are designated by the same reference numerals. Handling of such a device is accomplished by pressing the portion indicated by the arrow in FIG. 4 with tweezers.

[Problem that the invention seeks to solve]

To explain in more detail the patterning of the resist film explained with reference to FIG. 3, as shown in FIG.
A groove 17 is formed on the back surface of the s-substrate 11. Glass mask 1
However, due to the shape of groove I7,
Arrow 1. As shown by U, there is a difference in exposure distance, and there is a difference in development time, so the resist pattern may not be formed in accordance with the pattern 19 formed on the glass mask, or the alignment of the glass mask may be misaligned. . The resist used here is a Bonn type resist, and the reason for using it is that in the electrode formation process on the back of the substrate,
To protect the element 12, a glass plate is pasted on top of the element with wax, but if a negative resist is used, the
One scoop of It 111 must be heated to about 120'c, and then the wax mentioned above will melt and the protective glass plate will come off (wax melts at 80'c).
On the other hand, a positive resist can be removed with an acetone-based organic solvent at room temperature, and if the adhesive is less than 2%, there is no possibility that the glass plate will come off.

If the resist pattern is misaligned as shown in FIG. 7, the electrode 15 will be formed misaligned as shown, and this state is shown by the dotted line in FIG. If the electrodes shift in this way, when the device shown in Figure 4 is held in place with a pin, one side of the GaAs substrate IJ! The IJ was damaged by touching the tweezers, and the already made Ga-As MES F[E
There is a problem of making j into a defective product.

[Means for solving problems]

The present invention provides a method for manufacturing a semiconductor element that solves the above-mentioned problems. a step of forming a lattice-shaped groove corresponding to the arrangement of the elements, a step of forming a metal film on the back surface, a step of forming a photoresist IK' on the back surface and filling the groove with photoresist, and exposing the entire surface of the photoresist. This is accomplished by a method for manufacturing a semiconductor device, which comprises the following steps: developing to leave photoresist only at the bottoms of the grooves, and forming electrodes within the lattice defined by the grooves by metal plating.

[Effect]

In the method of the present invention, after etching grooves are formed in a lattice pattern on the back surface of a GaAs substrate, a resist is deposited on the entire back surface, and a mask is not used. Since the thicknesses of the G and IAS MES FIETs are different, the resist film remains only in the etching grooves, so that the electrodes of the G, 11AS MES FIET can be formed accurately.

[Embodiments] - Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a cross-sectional view of a main part of a semiconductor device in a step of implementing the method of the present invention, and will be described with reference to +al to 1) in the same figure.

FIG. 1(a): A FET element 22 is formed on a GaAs substrate 21 using a conventional technique. Scribe metal 23 is patterned in a grid pattern on a substrate 21. In addition, in the figure, 2
4 indicates the first resist IIW.

Figure 1(b): The scribe metal 23 is removed by etching.

FIG. 1(C): Prior to forming grooves on the back surface of the substrate 21, a surface protection glass 4 sheet 25 is attached using wax 26, and then the thickness of the substrate 21 is shaved to about 25 to 30 μm. A second resist (IIQ) is coated on the back surface of the substrate, exposed using a glass mask (not shown), and developed to form a resist film 27.

FIG. 1(d) Using the resist film 27 as a mask, the back surface of the substrate 21 is photo-etched to form a groove 28. The grooves 28 are formed in a lattice shape, and each of the lattices corresponds to an FET element 22.

FIG. 1(e) The resist film 27 is removed and a conductive metal film 29 is formed on the entire back surface of the substrate 21. As shown in FIG. The metal pattern 29 is formed by first depositing Ti to a thickness of 1000 mm and then evaporating a sieve to a thickness of 5000 mm.

FIG. 1(f): After depositing the metal film 29, a third positive type resist is applied to the entire surface by a spin code method to form a resist IIQ30. Resist 1 thickness is 3 to 5 μm on the flat part, '/A'
j Inside 28-(: Formed to have a thickness of approximately 30 μm.

FIG. 1(g): The entire back surface of the substrate is exposed, and then developed, leaving no resist l-30a with a thickness of about 15 μm only in the grooves 28.

Figure 1 (h): Electrode 3 is selectively plated with gold using a plating solution (for example, Kuninaka Precious Metals (42311iJ Temperosek 401)).
form 1. As described above, by plating, the Au layer grows both in the horizontal direction and in the vertical direction at a ratio of 1:1, but it does not grow on the resist, so the Au electrode 31 becomes as shown in the figure.

Figure 1 (1): Next, the electrode 31 is plated with N.
i1lA32 is formed, the resist is removed using an organic solvent at room temperature, Au and 1'i at the bottom of the groove 28 are removed, the metal film 29 at the bottom of the groove 28 is removed, and then Ni1lA32 is removed using a nitric acid-based solution. Remove the glass plate 25 by melting the wax 26 using an etching solution at room temperature.
The resist film 24 is peeled off.

A FIET with a diameter of 0.3 mm was obtained by cutting the part indicated by the dotted line in FIG. A source electrode, 34 a drain electrode, and 35 a gate electrode. The above-mentioned dicing can be easily performed because the electrodes 31 are separated along one line of the middle I width.

As shown in the figure, the electrodes 31 are arranged uniformly along the four sides of the device.
The overhang prevents the FET from being damaged during handling of the pincer device.

〔Effect of the invention〕

As explained above, according to the present invention, when forming an electrode with four sides in a lattice-like groove formed on the back surface of a GaAs substrate, the resist pattern necessary for separating the electrodes is formed by coating the entire back surface. Since the resist film is formed by exposing and developing the entire surface of the resist film, the process is simplified, and since there is no misalignment of the resist, there is no misalignment of the electrodes, and the electrodes can be stretched uniformly along the four sides of the FIET device. This prevents damage during handling of the FHT element.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the main parts of a semiconductor device in the process of carrying out the method of the present invention, FIG. 2 is a plan view of a NET element formed by the method shown in FIG. 1, and FIGS. The figure is a cross-sectional view of a conventional FET element, FIG. 5 is a side view showing sieve plating according to the conventional example, FIG. 6 is a cross-sectional view showing resist patterning according to the conventional example, and FIG. 7 is a positional deviation of the electrode in the conventional example. FIG. In the figure, 21 is a GaAs substrate, 22 is a FIET element, 23
24 is a scribe metal, 24 is a resist film, 25 is a surface protection glass, 26 is a wax, 27 is a resist film, 28
is a groove, 29 is a metal film, 30 is a resist 1lffi, 31
32 is a nickel film, 33 is a source electrode, 34 is a drain electrode, and 35 is a gate electrode. ff11Figure 1Figure 1Figure 2Figure 3Figure 4One Figure 5

Claims (1)

[Claims] A step of attaching a protective glass plate to the surface on which the compound semiconductor element is formed, and then forming a lattice-shaped groove corresponding to the arrangement of the cables on the back surface opposite to the element, and a step of forming a metal film on the back surface. , a step of forming a photoresist film on the back surface and filling the groove with photoresist; a step of exposing and developing the entire surface of the photoresist to leave the photoresist only at the bottom of the groove; and a grating defined by the groove by metal plating. 1. A method of manufacturing a semiconductor device, comprising the step of forming an electrode inside.