JPS5820138B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device having a fine pattern.

Generally, semiconductor devices are required to have fine patterns.

For example, semiconductor devices such as high-frequency high-frequency transistors (hereinafter referred to as HH transistors) and vertical junction field effect transistors (hereinafter referred to as JFETs) require fine patterns to improve their high-frequency characteristics. ing.

FIG. 1a=e is a process diagram showing a conventional manufacturing process for forming electrodes of a HH) transistor.

In the conventional method, as shown in FIG. 1A, first, an N-type base region 2 and a P-type emitter region 3 are formed in a predetermined portion of a P-type silicon substrate 1 by selective diffusion.

Next, a silicon oxide film 5 is formed on the entire surface 4 of the substrate 1 on which a predetermined diffusion region has been formed using a thermal oxidation method or a CVD method.

Subsequently, in order to provide contact holes for forming electrodes, photolithography is used to form a layer on the silicon oxide film 5 of the substrate 1.
An aperture is provided that reaches the base region 2 and the emitter region 3 to expose the base region 2 and the emitter region 3.

Next, as shown in FIG. 1, an electrode metal 6 such as aluminum (AI) is deposited on the full surface 4 side of the substrate 1 by vapor deposition.

Subsequently, in order to form an electrode on a predetermined area within the substrate 1, a photoresist 7 is applied as a mask member over the entire surface of the electrode metal 6 deposited on the substrate 1, and the predetermined area is formed using photolithography. A photoresist 7 is left on top, and a mask is provided for electrode formation.

Thereafter, as shown in FIG. 1C, the electrode metal 6 is etched using a predetermined etching solution using the photoresist 7 as a mask, and the photoresist 7 is removed. A base electrode 8 and an emitter electrode 9 were simultaneously formed on each of the base electrodes 8 and 9, respectively.

As described above, when forming electrodes in the conventional method, the base electrode 8 and emitter electrode 9 are formed simultaneously, which poses problems in terms of mask alignment accuracy in the photolithography process and optical accuracy during exposure. Unfortunately, there was a limit to how fine the electrode pattern could be.

This is because, as shown in FIG. 2, when a mask of photoresist 7 is provided on a predetermined area in substrate 1 by photolithography when simultaneously forming base electrode 8 and emitter electrode 9,
It is necessary to allow for an error of about 1 width as an allowable error for mask alignment, and about 2 eyes for the spacing L1 between the husband and husband electrodes due to the requirement of optical precision.

Therefore, taking into account these tolerances, the distance L2 between the contact holes must be at least 4 mm.

That is, there is an additional photolithography process for forming a contact hole in the silicon oxide film 5 of the substrate 1, and an additional photolithography process for forming a mask of photoresist 7 corresponding to a predetermined area after depositing the electrode metal 6. Since this is necessary, and dimensional errors in the photolithography process are taken into account, there is a problem in that there is a limit to how fine the electrode pattern of the HH) transistor can be made.

The present invention was made in view of the above drawbacks, and an object of the present invention is to provide a method for manufacturing a semiconductor device having a fine pattern.

The method of this invention will be explained in detail below based on the drawings.

FIGS. 3a to 3f show process dust showing a manufacturing process for forming electrodes of old transistors by applying the method of the present invention.

In this application example, as shown in FIG. 3a, first, an N-type base region 12 and a P-type emitter are formed in a predetermined portion of a P-type silicon substrate 11 made of a semiconductor material such as silicon (Si). Region 13 is formed by selective diffusion.

Next, the whole surface 14 of the substrate 11 is coated by thermal oxidation method or CVD.
A silicon oxide film 15 is formed using a method.

Thereafter, in order to provide a contact hole for forming an electrode, the silicon oxide film 15 is etched using a photolithography process to form an opening that reaches the substrate 11 and exposes the base region 12 and emitter region 13.

Subsequently, an electrode metal 16 such as aluminum is deposited on the whole surface 14 side of the substrate 11 by vapor deposition.

Note that the metal 16 for this electrode is nickel chrome (Ni
Cr) and aluminum by multilayer deposition, or platinum silicide (PtSi') on the contact area.
Aluminum may be deposited by vapor deposition after forming.

Thereafter, a photoresist is coated on the electrode metal 16 on the − principal surface 14 side, and without forming only the emitter electrode, a photolithography process is used to expose and develop the photoresist so that it remains on the emitter region 13. Then, a resist mask 17 is formed.

Note that a positive photoresist such as the product name Az1350 may be used as this photoresist.

Further, this mask member is not limited to the first resist, but may be any material that will serve as a mask in consideration of subsequent steps.

Next, as shown in FIG. 3 1)K, the metal 16 for the electrode is etched in a predetermined amount using the photoresist 17 as a mask.

Note that at this time, the metal 16 is etched inward from the periphery of the resist mask 170.

That is, the side surface of the emitter electrode 18 is side-etched.

Along with this, the emitter electrode 18 is formed, and the resist mask 17 has a shape projecting like a canopy from above the emitter electrode 18.

Note that this resist mask 17 has been subjected to baking treatment.

Subsequently, as shown in FIG. 3C, a positive photoresist 21 is applied to the entire surface of the substrate 11 on the 14 side.

This is done to cover the sides of the emitter electrode 18,
It is desirable to use a positive photoresist.

Next, as shown in FIG. 3d, the emitter electrode 18 is covered with a photoresist 17.21a.

This is because when the entire surface of the photoresist 21 applied to the surface 14 side of the substrate 11 is exposed, the photoresist 21a attached to the side surface of the emitter electrode 1B directly under the periphery of the resist mask 17 using the resist mask 17 as a mask is not exposed. become.

Therefore, the photoresist (21a) on the side surface of the emitter electrode 18 remains after a development process.

That is, the emitter electrode 18 is a photoresist) 17.21
A photoresist with a thin film thickness of approximately 0.5 to 1 mm is placed on the side surface of the emitter electrode 18.
1a will be attached.

Thereafter, as shown in FIG.
Deposit the entire surface on the 4th side.

The thickness of this vapor-deposited film is desirably slightly thinner than the film thickness when the metal 16 for the electrode is vapor-deposited at the time of forming the above-mentioned emitter electrode.

With this vapor deposition, on the base region 12 in the substrate 11, on the silicon oxide film 15, and on the resist mask 17,
Further, an electrode metal 16a such as aluminum is deposited so as to be in contact with the photoresist 21a covering the side surface of the emitter electrode 18.

Furthermore, as shown in FIG. 3f, a base electrode 19 is formed.

This is done by etching and removing unnecessary metal 16a for the electrode using photolithography.

In this case, the photoresist 17 used as a mask member
, and a photoresist 21a deposited on the side surface of the emitter electrode 18, the emitter electrode 18 is protected from being etched.

Thereafter, as the photoresists 17° and 21a are removed using a predetermined resist removal solution, the metal 16a on the resist mask 17 is peeled off together with the resist, and two separate electrodes are formed. By forming a narrow gap 20 of about 0.5 to 1 µm, the emitter electrode 18 and the base electrode 19 are formed with a predetermined gap 20 between them.

In addition, first, the photoresists 17 and 21a are removed together with the metal 16a on the resist 17 using a predetermined resist removal liquid, and then the unnecessary metal 16a is removed using photolithography.
It can also be removed by etching.

As described above, in this application example, the base and emitter electrodes 19
．． 18 are formed separately, and therefore the gap 20 between both electrodes can be made very small.
A fine pattern of electrodes can be formed on the electrode.

FIG. 4 shows a cross-sectional view of a JFET electrode formed by applying the method of the present invention.

In the figure, 31 is an N-type semiconductor substrate, and 32a and 32b are P-type first and second gate regions, which are provided separately within the substrate 31, respectively.

33 is an N-type source region, and first and second gate regions 32a in the substrate 31.

32b.

34 is a silicon oxide film provided on the entire surface 35 of the substrate 31 with each region exposed; 36a and 36b are first and second gate electrodes provided with contact holes for electrode formation; They are formed so as to be in contact with the first and second gate regions 32a and 32b in the substrate 31, respectively.

37 is a source electrode, which is in contact with the source region 33.

Note that the manufacturing process of this JFET electrode is the same as the above-mentioned HH
) The substrate 31 is manufactured in the same manner as the manufacturing process of transistor electrodes.
Therein are first and second gate regions 32a.

32b and the source region 33, first, a source electrode 37 is formed using a photoresist as a mask, and the side surface of the source electrode 37 is side-etched.

Next, the source electrode 37 is completely covered with the photoresist by applying photoresist again and performing exposure and development processing.

Thereafter, in order to form a gate electrode, metal for the electrode is deposited on the entire surface and the photoresist is removed, thereby forming the source electrode 37 and the first and second gate electrodes 36a, 36b.
can be formed through a slight gap 38.

Therefore, a fine pattern of electrodes can be obtained.

As described above, in these application examples, the method of the present invention was applied when forming an electrode on a semiconductor substrate, but the method of the present invention is not limited to this, and it does not matter whether the emitter electrode or the base electrode is formed first. This method can be applied to forming fine patterns such as electrodes or oxide films on a single semiconductor substrate.

Further, in the application example, the method of the present invention is applied to an HH) transistor and a JFET, but the method of the present invention is not limited thereto, and can be applied to a semiconductor device that requires a fine pattern on a semiconductor substrate.

As described above, in the method of the present invention, the side surface of the first layer selectively provided on the whole surface of the semiconductor substrate is side-etched through the first mask member, and the side surface of the first layer selectively provided on the whole surface of the semiconductor substrate is side-etched. 2
selectively etching the second mask member using the first mask member as a mask to leave the second mask member on the side surface of the side-etched first layer; After that, since the second layer in contact with the second mask member is provided on the whole surface of the substrate, the first layer and the second layer are separated by the second mask member, so that the second layer is in contact with the second mask member. This has the effect of allowing fine processing depending on the thickness of the mask member.

Furthermore, if the second mask member remaining on the side surface of the side-etched first layer is removed (lifted off), the first layer and the second layer can be electrically connected to each other regardless of the material of the second mask member. This has the effect of allowing micropatterns such as metal electrodes to be easily realized.

[Brief explanation of the drawing]

1a-e are process diagrams showing a conventional manufacturing process for forming electrodes of a HH transistor; FIG. 2 is a partial cross-sectional view of an HH transistor manufactured by the conventional method;
Figures a-f are process diagrams showing the manufacturing process for forming electrodes of HH) transistors by applying the method of this invention, and Figure 4 is a cross-sectional view of forming JFET electrodes by applying the method of this invention. shows. In addition, the same reference numerals are given to the same parts or corresponding parts in the figures. 11.31・・・・・・・・・Semiconductor substrate, 1T
......First mask member, 1B, 3
7・・・・・・・・・・・・First layer, 19.36a,
36b・・・・・・・・・Second layer, 21°21
a......Second mask member.

Claims (1)

[Claims] 1. A step of side-etching a side surface of a first layer provided on a whole surface of a semiconductor substrate through a first mask member provided on the first layer, the above-mentioned side etching A second mask member is applied to the entire surface side of the semiconductor substrate including the side surface of the first layer, and the second mask member is selectively etched using the first mask member as a mask. a step of leaving the second mask member on the side surface of the side-etched first layer; a step of providing a second layer in contact with the second mask member on the entire surface of the semiconductor substrate; 1. A method of manufacturing a semiconductor device, characterized in that a first layer and a second layer are separated by the second mask member. 2. A method for manufacturing a semiconductor device, characterized in that in the method according to claim 1, an electrode metal is used for the first layer and the second layer. 3. A method of manufacturing a semiconductor device according to claim 1 or 2, characterized in that a positive photoresist is used as the second mask member. 4. A method for manufacturing a semiconductor device according to claim 1, claim 2, characterized in that a positive photoresist is used for the first mask member and the second mask member. 5. A step of side-etching the side surface of the first layer provided on the entire surface of the semiconductor substrate through a first mask member provided on the first layer, the side-etched first layer A second mask member is applied to the entire surface side of the semiconductor substrate including the side surfaces of the semiconductor substrate, and the second mask member is selectively etched using the first mask member as a mask to remove the side-etched first mask member. a step of leaving the second mask member on the side surface of the layer; a step of providing a second layer in contact with the second mask member on the whole surface of the semiconductor substrate; and a step of leaving the second mask member on the side surface of the first layer. A method for manufacturing a semiconductor device, including the step of removing a second mask member. 6. In the method according to claim 5, the first
1. A method for manufacturing a semiconductor device, characterized in that an electrode metal is used for the layer and the second layer. 7. A method for manufacturing a semiconductor device according to claim 5 or 6, characterized in that a positive photoresist is used for the first mask member and the second mask member. .