JPH0414212A - Resist pattern formation - Google Patents

Abstract

PURPOSE:To enhance the throughput and the productivity in forming a mushroom type gate by a method wherein a substrate is coated with a first layer resist and, after finishing the baking process, the first layer is coated with the same resist to be baked at a lower temperature and then subjecting the substrate to electron lithography. CONSTITUTION:A lower layer resist film 7 in thickness of 0.2mum is formed by spinner-coating a resist mainly comprising polymethylmethacrylate to be prebaked at 170 deg.C for 30 minutes and then an upper layer resist film 8 in thickness of 0.6mum is formed by spinner-coating with the same resist at the lower temperature of 110 deg.C for 30 minutes. Next, specific pattern is drawn in the lower layer by irradiating with electron beams 9 for thin parting pattern in width of 0.25mum while checking the alignment marks 22 on all chips 21. Finally, a thick pattern in width of 0.5mum is drawn on the film 8 while a thin pattern in width of 0.25mum is drawn on the film 7 by immersing the whole body in a rinsing solution after finishing the development.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a resist pattern during the manufacture of high-density integrated circuits such as LSIs and VLSIs, and particularly relates to a resist pattern formation method suitable for forming a pine mushroom type gate. The present invention relates to a pattern forming method.

[Prior Art] In recent years, demands for higher performance and higher image integration of semiconductor integrated circuits and the like have further increased. Therefore, efforts are being made to establish ultra-fine pattern processing technology by phosphorography using electron beams, soft X-rays, ion beams, etc. in place of conventional photolithography using ultraviolet rays. Particularly in the production of photomasks, electron beam lithography has already been put into practical use industrially, and attempts have also been made to directly write electron beams onto wafer substrates.

On the other hand, in order to make such ultra-fine lithography technology possible, the drawing precision required of exposure equipment has also become stricter.
The resist material used must also have properties that meet these requirements, and the resist process is also extremely important.

Many types of materials have been developed as resists, but these are positive type, which causes a breakage reaction when irradiated with an electron beam, etc., and the irradiated area becomes solubilized, and positive type, which causes a crosslinking reaction when irradiated with an electron beam, etc. It is classified as a negative type in which the irradiated part becomes insolubilized. Of the two, positive resists are superior to negative resists in that they can form ultra-fine, high-resolution images.

Now, in order to improve the frequency and performance of compound field effect transistors, it is essential to shorten the gate length and reduce the gate resistance, and efforts are being made in various fields to form a pine mushroom type gate.

Conventionally, the method used to form a pine mushroom-type gate is to apply different types of resist in layers and then draw thick and thin patterns overlappingly using an electron beam (Report of the Japan Society of Applied Physics, Autumn 1988). 6a-ni-
8).

[Problems to be Solved by the Invention] However, overlapping turns with two patterns, a thick pattern and a thin pattern, using electron beam lithography has the problem of reducing throughput and deteriorating productivity. Ta.

Furthermore, since different types of resists are stacked, the developer and development conditions for each resist are different, complicating the process.

The present invention is intended to solve the above-mentioned problems, and an object of the present invention is to provide a resist pattern forming method that can improve throughput and thereby improve productivity when forming a mushroom-type gate. It is.

[Means for solving the problem] By the way, in general, when forming a renost layer on a wafer substrate, after applying a resist with a spinner etc., in order to improve the adhesion between the wafer substrate and the resist, and to improve the adhesion between the wafer substrate and the resist, Baking is performed for purposes such as removing unnecessary solvents, but in the case of positive resists, the sensitivity changes depending on the baking temperature. Specifically, those baked at high temperatures have lower sensitivity than those baked at lower temperatures. It is known that

The present invention utilizes the characteristics of the positive resist described above, and in the resist pattern forming process, baking is performed after applying the first layer of resist on the substrate, and then baking is performed on the first layer of resist. If you apply a second layer of resist using the same resist and bake it at a lower temperature than the first layer, the sensitivity of the resist will be different between the first and second layers, and the second layer will It was completed after discovering that it has higher sensitivity than the first layer of resist, and that it is possible to form Masson-Hulum type gates for field effect transistors using the lift-off method under -degree electron beam lithography and the same development conditions. be.

[Function] In the present invention, since the same resist is used for the first lower layer and the second upper layer, the adhesion of each layer is good, and since the resist is the same, the same developer is required, making the process easy. It is.

In addition, in electron beam lithography, it is possible to form a desired pattern on the upper and lower layers with one lithography, which improves throughput compared to the conventional method that requires lithography twice. This does not cause positional deviation.

[Example 1] Hereinafter, with reference to the drawings, HEM using a GaAs wafer substrate was fabricated by the resist pattern forming process of the present invention.
T (high electron mobility transistor, Hlgh Elec
tron Mobllty Transistor)
An example of manufacturing a Masson Yuroom type gate of a device will be described.

FIG. 1 is a cross-sectional view showing the steps of a resist pattern forming method according to the present invention, and FIG. 2 is a diagram showing a method of forming a resist pattern.

As shown in FIG. 2, a plurality of chips 21 (48 chips in FIG. 2) are formed on the wafer 20, and a pattern is drawn in a predetermined range of each chip 21 using an electron beam. An alignment mark 22 is formed at a predetermined position of each chip 21, at the upper left corner in FIG. 2, to be used for alignment during drawing. Note that 23 in FIG. 2 is a wafer mark.

A method of forming a resist pattern on such a wafer 20 will be explained with reference to FIG. 1 as follows. In FIG. 1, 1 is a semi-insulating GaAS substrate, 2 is a high-purity GaAs epitaxial layer, 3 is a two-dimensional electron channel, 4 is an n-type AlGaAs layer, 5 is a source electrode, 6 is a drain electrode, and 7 is a lower layer. resist film, 8 is an upper resist film,
9 is an electron beam, 10 is a pattern for forming a mushroom type gate, 11 is a gate electrode metal film, and 12 is a mushroom type gate.

First, as shown in FIG. 1(a), a semi-insulating GaAs substrate 1
A high-purity GaAs epitaxial layer 2 is formed thereon, and a two-dimensional electron channel 3 is formed on the surface of the high-purity GaAs epitaxial layer 2, and then an n-type AlGaAs layer 4 is formed. Source and drain electrodes 5.6 are formed by vacuum-depositing, for example, a mixture of AU and Ge or Au alone thereon, and alloying is performed to obtain ohmic contact with the two-dimensional electron channel 3.

Next, as shown in FIG. 1(b), a resist (trade name: Tokyo Ohka Type 0
EH-1000) coated with a spinner, 170
C. for 30 minutes to obtain a lower resist film 7 with a film thickness of 0.2 μm. Next, a resist containing polymethyl methacrylate as a main component (product name: Tokyo Ohka 0EBR-
1000) coated with a spinner at 110°C.
After prebaking for 0 minutes, an upper resist film 8 having a thickness of 0.6 μm was obtained.

Next, positioning marks 22 for all chips 21 are
As shown in Fig. 1 (C), while detecting the electron beam 9, a thin patterning electron beam 9 is applied to the lower layer so as to have a width of 0.25 μm at an acceleration voltage of 20 kV1 and an exposure amount of 100 μC/cd.
A predetermined pattern was drawn.

After completing the above electron beam drawing, next, immerse it in a developer (methyl isobutyl ketone: isopropyl alcohol = 13) at 23℃ for 60 seconds for development, and then immerse it in a rinse solution (isopropyl alcohol) for 30 seconds at 23℃. and rinsed.

As a result, as shown in FIG. 1(d), the upper layer resist pattern has a width of 10.5 μm and the lower layer resist pattern has a width of 0.5 μm.
Pattern 1 for forming a 25 μm pine mushroom type gate
0 was obtained. Due to this, the electron beam lithography described earlier,
It was confirmed that a thick pattern with a width of 0.5 μm was drawn on the upper resist film M8, and a thin pattern with a width of 0.25 μm was drawn on the lower resist film 7.

Using the thus obtained pattern 1o for forming a mushroom type gate as a mask, TI
After sequentially depositing Pt and Au to form a gate electrode metal MII as shown in FIG. 1(e), the upper resist film 8 and the lower resist film 7 are dissolved and removed using acetone. Gate length 0.25 μm1 as shown in f)
An Au pine mushroom type game (12) having an upper width of 0.5 μm and a length of 200 μm was formed.

[Effects of the Invention] As is clear from the above description, according to the present invention, a resist pattern for a pine mushroom type gate can be formed under -degree electron beam lithography and under the same development conditions.
This can improve throughput.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(f) are cross-sectional views showing the manufacturing process of a HEMT device according to the present invention, and FIG. 2 is a top view showing alignment marks on a wafer. 1... Semi-insulating GaAs substrate, 2... High purity GaA
S epitaxial layer, 3...2-dimensional electron channel,
4... n-type AlGaAs layer, 5... source electrode, 6
...Drain electrode, 7... Lower resist film, 8...
- Upper resist film, 9... Electron beam, 10... Pattern for forming a mushroom type gate, 11... Gate electrode metal film, 12... Munchroom type gate. Applicant Dai Nippon Printing Co., Ltd. Agent Patent Attorney Hideo Sugai (7 others) Figure

Claims (1)

[Claims] (1) After applying the first resist layer on the substrate and baking it, apply the same resist as the first layer on top of it and baking it at a lower temperature than the first layer, and then perform electron beam lithography. . A method for forming a resist pattern, the method comprising the steps of: and then developing.