JPS6157619U - - Google Patents

Info

Publication number
JPS6157619U
JPS6157619U JP14013384U JP14013384U JPS6157619U JP S6157619 U JPS6157619 U JP S6157619U JP 14013384 U JP14013384 U JP 14013384U JP 14013384 U JP14013384 U JP 14013384U JP S6157619 U JPS6157619 U JP S6157619U
Authority
JP
Japan
Prior art keywords
fet
impedance converter
bipolar transistor
source
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14013384U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14013384U priority Critical patent/JPS6157619U/ja
Publication of JPS6157619U publication Critical patent/JPS6157619U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のエミツタフオロワのトランジス
タによるインピーダンス変換器の回路図、第2図
は従来のソースフオロワのFETによるインピー
ダンス変換器の回路図、第3図はこの考案の一実
施例を示すインピーダンス変換器の回路図、第4
図および第5図はこの考案の他の実施例のインピ
ーダンス変換器の回路図である。 11…入力端子、12…B電源、13…FET
、14…バイポーラトランジスタ、15…ソース
抵抗、16…出力端子、18…抵抗。
Fig. 1 is a circuit diagram of an impedance converter using a conventional emitter follower transistor, Fig. 2 is a circuit diagram of a conventional impedance converter using a source follower FET, and Fig. 3 is a circuit diagram of an impedance converter using a conventional source follower FET. Circuit diagram, 4th
5 and 5 are circuit diagrams of an impedance converter according to another embodiment of this invention. 11...Input terminal, 12...B power supply, 13...FET
, 14... Bipolar transistor, 15... Source resistor, 16... Output terminal, 18... Resistor.

Claims (1)

【実用新案登録請求の範囲】 (1) FETのソースフオロワ回路のドレイン電
流を、バイポーラトランジスタによつて検出増幅
し、上記FETのソースへ出力することを特徴と
するインピーダンス変換器。 (2) バイポーラトランジスタのエミツタ電流を
出力とすることを特徴とする実用新案登録請求の
範囲第1項記載のインピーダンス変換器。
[Claims for Utility Model Registration] (1) An impedance converter characterized in that a drain current of a source follower circuit of an FET is detected and amplified by a bipolar transistor and outputted to the source of the FET. (2) The impedance converter according to claim 1, which is characterized in that the output is the emitter current of a bipolar transistor.
JP14013384U 1984-09-13 1984-09-13 Pending JPS6157619U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14013384U JPS6157619U (en) 1984-09-13 1984-09-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14013384U JPS6157619U (en) 1984-09-13 1984-09-13

Publications (1)

Publication Number Publication Date
JPS6157619U true JPS6157619U (en) 1986-04-18

Family

ID=30698491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14013384U Pending JPS6157619U (en) 1984-09-13 1984-09-13

Country Status (1)

Country Link
JP (1) JPS6157619U (en)

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