JPS615623A - 多値論理回路 - Google Patents

多値論理回路

Info

Publication number
JPS615623A
JPS615623A JP59127122A JP12712284A JPS615623A JP S615623 A JPS615623 A JP S615623A JP 59127122 A JP59127122 A JP 59127122A JP 12712284 A JP12712284 A JP 12712284A JP S615623 A JPS615623 A JP S615623A
Authority
JP
Japan
Prior art keywords
type mos
enhancement type
mos transistor
electrode
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59127122A
Other languages
English (en)
Japanese (ja)
Other versions
JPH042011B2 (enrdf_load_stackoverflow
Inventor
Yukio Yasuda
幸夫 安田
Yasunobu Tokuda
泰信 徳田
Shizuaki Zaima
財満　鎮明
Tetsuo Nakamura
哲郎 中村
Akira Yoshida
明 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Science and Technology Agency
Shingijutsu Kaihatsu Jigyodan
Original Assignee
Research Development Corp of Japan
Shingijutsu Kaihatsu Jigyodan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Research Development Corp of Japan, Shingijutsu Kaihatsu Jigyodan filed Critical Research Development Corp of Japan
Priority to JP59127122A priority Critical patent/JPS615623A/ja
Publication of JPS615623A publication Critical patent/JPS615623A/ja
Publication of JPH042011B2 publication Critical patent/JPH042011B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Logic Circuits (AREA)
JP59127122A 1984-06-20 1984-06-20 多値論理回路 Granted JPS615623A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59127122A JPS615623A (ja) 1984-06-20 1984-06-20 多値論理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59127122A JPS615623A (ja) 1984-06-20 1984-06-20 多値論理回路

Publications (2)

Publication Number Publication Date
JPS615623A true JPS615623A (ja) 1986-01-11
JPH042011B2 JPH042011B2 (enrdf_load_stackoverflow) 1992-01-16

Family

ID=14952148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59127122A Granted JPS615623A (ja) 1984-06-20 1984-06-20 多値論理回路

Country Status (1)

Country Link
JP (1) JPS615623A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62204498A (ja) * 1986-03-04 1987-09-09 Omron Tateisi Electronics Co 多値メモリ
JPS6342221A (ja) * 1986-08-07 1988-02-23 Yukio Yasuda ダイナミツク型多値回路
WO2007088901A1 (ja) * 2006-01-31 2007-08-09 Japan Advanced Institute Of Science And Technology 三値論理関数回路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62204498A (ja) * 1986-03-04 1987-09-09 Omron Tateisi Electronics Co 多値メモリ
JPS6342221A (ja) * 1986-08-07 1988-02-23 Yukio Yasuda ダイナミツク型多値回路
WO2007088901A1 (ja) * 2006-01-31 2007-08-09 Japan Advanced Institute Of Science And Technology 三値論理関数回路
US7755391B2 (en) 2006-01-31 2010-07-13 Japan Advanced Institute Of Science And Technology Three-valued logic function circuit
KR100971644B1 (ko) * 2006-01-31 2010-07-26 고쿠리츠다이가쿠호진 호쿠리쿠 센단 가가쿠 기쥬츠 다이가쿠인 다이가쿠 3치 논리 함수 회로

Also Published As

Publication number Publication date
JPH042011B2 (enrdf_load_stackoverflow) 1992-01-16

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term