JPS6155770A - 優先順位決定回路 - Google Patents

優先順位決定回路

Info

Publication number
JPS6155770A
JPS6155770A JP17777084A JP17777084A JPS6155770A JP S6155770 A JPS6155770 A JP S6155770A JP 17777084 A JP17777084 A JP 17777084A JP 17777084 A JP17777084 A JP 17777084A JP S6155770 A JPS6155770 A JP S6155770A
Authority
JP
Japan
Prior art keywords
priority
stage
determination circuit
priority determination
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17777084A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0235335B2 (enrdf_load_stackoverflow
Inventor
Minoru Etsuno
越野　実
Masanori Takahashi
正徳 高橋
Hidehiko Nishida
西田　秀彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17777084A priority Critical patent/JPS6155770A/ja
Publication of JPS6155770A publication Critical patent/JPS6155770A/ja
Publication of JPH0235335B2 publication Critical patent/JPH0235335B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP17777084A 1984-08-27 1984-08-27 優先順位決定回路 Granted JPS6155770A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17777084A JPS6155770A (ja) 1984-08-27 1984-08-27 優先順位決定回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17777084A JPS6155770A (ja) 1984-08-27 1984-08-27 優先順位決定回路

Publications (2)

Publication Number Publication Date
JPS6155770A true JPS6155770A (ja) 1986-03-20
JPH0235335B2 JPH0235335B2 (enrdf_load_stackoverflow) 1990-08-09

Family

ID=16036817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17777084A Granted JPS6155770A (ja) 1984-08-27 1984-08-27 優先順位決定回路

Country Status (1)

Country Link
JP (1) JPS6155770A (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149629A (en) * 1980-04-21 1981-11-19 Nec Corp Information processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149629A (en) * 1980-04-21 1981-11-19 Nec Corp Information processor

Also Published As

Publication number Publication date
JPH0235335B2 (enrdf_load_stackoverflow) 1990-08-09

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