JPS6153754B2 - - Google Patents

Info

Publication number
JPS6153754B2
JPS6153754B2 JP56197388A JP19738881A JPS6153754B2 JP S6153754 B2 JPS6153754 B2 JP S6153754B2 JP 56197388 A JP56197388 A JP 56197388A JP 19738881 A JP19738881 A JP 19738881A JP S6153754 B2 JPS6153754 B2 JP S6153754B2
Authority
JP
Japan
Prior art keywords
processor
instruction
processors
memory
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56197388A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5899867A (ja
Inventor
Hiroshi Hatsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP19738881A priority Critical patent/JPS5899867A/ja
Publication of JPS5899867A publication Critical patent/JPS5899867A/ja
Publication of JPS6153754B2 publication Critical patent/JPS6153754B2/ja
Granted legal-status Critical Current

Links

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  • Multi Processors (AREA)
  • Advance Control (AREA)
JP19738881A 1981-12-08 1981-12-08 並列処理方式 Granted JPS5899867A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19738881A JPS5899867A (ja) 1981-12-08 1981-12-08 並列処理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19738881A JPS5899867A (ja) 1981-12-08 1981-12-08 並列処理方式

Publications (2)

Publication Number Publication Date
JPS5899867A JPS5899867A (ja) 1983-06-14
JPS6153754B2 true JPS6153754B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-11-19

Family

ID=16373674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19738881A Granted JPS5899867A (ja) 1981-12-08 1981-12-08 並列処理方式

Country Status (1)

Country Link
JP (1) JPS5899867A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63231362A (ja) * 1987-03-19 1988-09-27 Ricoh Co Ltd 複写機
JP2003006173A (ja) * 2001-04-18 2003-01-10 Matsushita Electric Works Ltd 情報処理装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916652A (en) * 1987-09-30 1990-04-10 International Business Machines Corporation Dynamic multiple instruction stream multiple data multiple pipeline apparatus for floating-point single instruction stream single data architectures

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IEEE CATALOG=1978 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63231362A (ja) * 1987-03-19 1988-09-27 Ricoh Co Ltd 複写機
JP2003006173A (ja) * 2001-04-18 2003-01-10 Matsushita Electric Works Ltd 情報処理装置

Also Published As

Publication number Publication date
JPS5899867A (ja) 1983-06-14

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